Memory Ordering Buffer Allocation in Multi-Strand Processors

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Solution Overview

Problem

In multi-strand out-of-order loop processors, the ordering buffer often becomes oversubscribed, leading to serialization of instruction execution and starvation, particularly when young orderable instructions prevent elder instructions from being retired, thereby impeding parallel execution and performance.

Innovation Solution

Implementing an eldest real program order (RPO) calculation circuit and RPO limit calculation circuit to prioritize elder orderable instructions by determining the RPO of the eldest undispatched instruction and setting an RPO limit, allowing only instructions with an RPO less than or equal to this limit to be inserted into the ordering buffer, thereby preventing younger instructions from overwhelming the buffer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple strands insert entries into the ordering buffer concurrently, then parallel execution performance is improved, but the ordering buffer becomes oversubscribed causing serialization and starvation

Engineering Contradiction:
Improveparallel execution performanceVSAvoidexecution continuity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by calculating and establishing an RPO limit threshold before the ordering buffer becomes oversubscribed. This threshold is determined in advance based on the number of active strands and buffer capacity, allowing the system to preemptively prevent younger instructions from blocking elder instructions, thereby maintaining continuous execution without waiting for buffer space to open up naturally.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by implementing different insertion criteria for different instruction types based on their RPO values. Elder instructions (with lower RPO values) are allowed to insert into the ordering buffer even when it is partially full, while younger instructions (with higher RPO values) are blocked from insertion. This creates a quality differentiation in the buffer admission policy that prevents starvation while maintaining parallelism.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If the ordering buffer is filled with young orderable instructions, then recent instructions are processed, but elder instructions are starved and cannot be retired

Engineering Contradiction:
Improvenumber of instructions in bufferVSAvoidinstruction retirement delay
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent implements feedback by continuously monitoring the RPO values of instructions attempting to enter the ordering buffer and comparing them against the pre-calculated RPO limit threshold. This feedback mechanism dynamically controls which instructions are admitted to the buffer, ensuring that elder instructions are prioritized and can be retired promptly without being blocked by younger instructions, thereby reducing retirement delays.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies preliminary action by pre-calculating the RPO limit threshold based on the number of active strands and buffer capacity before execution begins. This advance determination of the RPO limit allows the system to preemptively prevent younger instructions from blocking elder instructions, ensuring continuous retirement capability without waiting for buffer space to open up naturally.

Inventive Principle:
Principle #10Preliminary action

3Quantity of substance

If strands wait for ordering buffer space to become available, then buffer occupancy is managed, but execution becomes serial instead of concurrent

Engineering Contradiction:
Improveordering buffer occupancyVSAvoidconcurrent execution capability
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent applies preliminary action by establishing an RPO limit threshold in advance that allows elder instructions to enter the ordering buffer even when it is partially occupied by younger instructions. This preemptive measure eliminates the need for strands to wait for buffer space to open up, maintaining concurrent execution capability while managing buffer occupancy through RPO-based prioritization rather than simple space availability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10235171B2Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processor
Publication Date: 2019.03.19 INTEL CORP
  • US10235171B2 patent drawing
  • US10235171B2 patent drawing
  • US10235171B2 patent drawing

AI summary

An apparatus includes a first circuit to determine a real program order (RPO) of an eldest undispatched instruction from among a plurality of strands, a second circuit to determine an RPO limit based on a delta value and the RPO of the eldest undispatched instruction, an ordering buffer to store entries for instructions that are waiting to be retired, and a third circuit to execute an orderable instruction from a strand from the plurality of strands to cause an entry for the orderable instruction to be inserted into the ordering buffer in response to a determination that an RPO of the orderable instruction is less than or equal to the RPO limit.