Semiconductor Memory Data Output Circuit Linear Voltage Control

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Solution Overview

Problem

Conventional semiconductor memory apparatus data output circuits face challenges in linearly controlling the current supplied to the ground terminal, which complicates the linear variation of the output signal's voltage level, limiting the variable range of the output signal.

Innovation Solution

A data output circuit for a semiconductor memory apparatus is designed with a driver unit control signal generating unit that generates control signals based on test signals and fuse status, and includes multiple driver units that can be activated to drive data signals, allowing for linear control of the output signal's voltage level by adjusting the number of active driver units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the levels of the gate voltages of the first and fourth transistors are changed to control the amount of current supplied to the ground terminal, then the voltage level of the output signal can be varied, but it is difficult to linearly control the amount of current supplied to the ground terminal, making it difficult to linearly vary the voltage level of the output signal

Engineering Contradiction:
Improvelinear control of currentVSAvoidcontrol mechanism complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The second driver is divided into multiple driver units (at least two) that can be independently controlled. Each driver unit corresponds to a specific voltage level of the output signal. By selectively activating different combinations of driver units, the circuit achieves linear control of the current supplied to the ground terminal, thereby linearly varying the output signal voltage level without complex control mechanisms.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If multiple driver units are used to linearly control the output signal voltage level, then the variable range of the output signal is increased, but the number of transistors and control signals increases

Engineering Contradiction:
Improvevariable range of output signalVSAvoidnumber of transistors and control signals
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The second driver is segmented into multiple driver units with different transistor sizes (different current capacities). This segmentation allows the circuit to achieve multiple voltage levels by activating different combinations of driver units, effectively increasing the variable range of the output signal while maintaining a manageable number of components through systematic design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit dynamically activates different combinations of driver units based on the desired output voltage level. The control signal generating unit dynamically selects which driver units to activate, enabling flexible and adaptable control of the output signal voltage level across a wide range while maintaining efficient use of the available transistors and control signals.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7808841B2Data output circuit for semiconductor memory apparatus
Publication Date: 2010.10.05 SK HYNIX INC
  • US7808841B2 patent drawing
  • US7808841B2 patent drawing
  • US7808841B2 patent drawing

AI summary

A data output circuit for a semiconductor memory apparatus includes a driver control signal generating unit that has a plurality of control signal generating units, each of which generates a driver unit control signal in response to a test signal during a test, and generates the driver unit control signal according to whether or not a fuse is cut after the test is completed, a first driver that has a plurality of driver units, each of which is activated in response to the driver unit control signal to drive a first data signal as an input signal and to output the driven first data signal to an output node, a signal combining unit that generates a first driver control signal in response to the driver unit control signal and an enable signal, and a second driver that has a plurality of driver units, each of which is activated in response to the first driver control signal to drive a second data signal as an input signal and to output the driven second data signal to the output node, and the number of driver units being two or more times as much as the number of driver units in the first driver. A voltage level on the output node is the voltage level of an output signal.