Memory Output Driver Circuit for High-Speed Impedance Matching
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Solution Overview
Problem
High-speed data transmission in memory systems often experiences signal reflection due to impedance mismatch between the memory controller's input/output terminals and the data transmission line, leading to unstable data reception and interference.
Innovation Solution
A memory system incorporating a data output driver with a pull-up switching unit, a pull-up resistor unit, a pull-down switching unit, and a pull-down resistor unit, which includes PMOS and NMOS transistors controlled by data signals to manage impedance and reduce signal reflection through reference voltage generation and calibration circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data transmission speed is increased, then productivity is improved, but signal reflection occurs due to impedance mismatch
Solution Approach 1:
The patent changes the impedance parameter of the data output terminal by dynamically adjusting the resistance value using a pull-up resistor unit and pull-down resistor unit. These resistor units are controlled by calibration codes to match the impedance with the data transmission line, thereby preventing signal reflection while maintaining high-speed data transmission.
2Reliability
If impedance calibration circuit is added, then signal reflection is reduced, but device complexity increases
Solution Approach 1:
The patent merges the impedance calibration function with the existing data output driver circuitry. The pull-up resistor unit and pull-down resistor unit are integrated into the data output terminal structure, and the calibration codes are combined with the data output control signals. This integration achieves impedance matching without adding a separate standalone calibration circuit.
Solution Approach 2:
The data output driver performs self-calibration by using internally generated calibration codes to automatically adjust its output impedance. The circuit monitors and adjusts its own impedance characteristics without requiring external calibration equipment or complex external circuits, thereby reducing overall system complexity.
Data Source
AI summary
A memory system includes: a buffer memory device; and a memory controller including a data output driver configured to output data to the buffer memory device, wherein the data output driver includes: a pull-up switching unit coupled to an input/output power voltage, the pull-up switching unit including a PMOS transistor controlled by a data signal that varies according to the output data; a pull-up resistor unit including an NMOS transistor coupled to a DQ pad; a pull-down switching unit controlled by the data signal; and a pull-down resistor unit coupled to the pull-down switching unit.