Memory Output Driver Switching Between Differential and Single Modes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional output drivers for semiconductor memory devices are limited in their ability to adapt between differential and single modes, leading to inefficiencies in testing, particularly during low-frequency tests where the number of test pins required is not minimized.
Innovation Solution
An output driver design that includes a first and second transistor, along with a current supplying circuit capable of operating as a current source in differential mode and as a resistor in single mode, utilizing NMOS and PMOS transistors and an inverter to selectively adjust operation based on a mode selecting signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the output driver operates in differential mode, then high-frequency characteristics are improved, but the number of test pins increases
Solution Approach 1:
The output driver dynamically switches between differential mode and single mode based on the frequency of the input signal. A frequency detection circuit identifies whether the input signal is high-frequency or low-frequency, and accordingly configures the output driver to operate in differential mode for high-frequency signals or single mode for low-frequency signals, thereby adaptively optimizing performance for different operating conditions
Solution Approach 2:
The output driver changes its operational parameters based on input signal characteristics. When the input signal frequency exceeds a threshold, the driver configures itself for differential operation with appropriate biasing and transistor configurations; when the frequency is below the threshold, it reconfigures for single-ended operation, thus adapting its electrical characteristics to match the operating frequency range
2Quantity of substance
If the output driver operates in single mode, then the number of test pins is reduced, but high-frequency characteristics are not utilized
Solution Approach 1:
The output driver dynamically switches between differential mode and single mode based on the frequency of the input signal. A frequency detection circuit identifies whether the input signal is high-frequency or low-frequency, and accordingly configures the output driver to operate in differential mode for high-frequency signals or single mode for low-frequency signals, thereby adaptively optimizing performance for different operating conditions
Solution Approach 2:
The output driver changes its operational parameters based on input signal characteristics. When the input signal frequency exceeds a threshold, the driver configures itself for differential operation with appropriate biasing and transistor configurations; when the frequency is below the threshold, it reconfigures for single-ended operation, thus adapting its electrical characteristics to match the operating frequency range
3Device complexity
If a conventional output driver is used, then the circuit structure is simple, but it cannot adapt to different testing requirements
Solution Approach 1:
The output driver is designed with multi-functionality to handle both differential and single-ended operation modes within a single circuit architecture. The circuit includes switching elements and biasing circuits that enable it to perform different functions based on operating conditions, making it universally applicable to both high-frequency differential testing and low-frequency single-ended testing without requiring separate dedicated circuits
Solution Approach 2:
The output driver dynamically switches between differential mode and single mode based on the frequency of the input signal. A frequency detection circuit identifies whether the input signal is high-frequency or low-frequency, and accordingly configures the output driver to operate in differential mode for high-frequency signals or single mode for low-frequency signals, thereby adaptively optimizing performance for different operating conditions
Data Source
AI summary
An output driver of a semiconductor memory device that operates in a differential mode and in a single mode is disclosed. The output driver includes a current supplying circuit that operates as a resistor in a single mode and as a current source in a differential mode. Accordingly, the semiconductor memory device including the output driver can have high test efficiency, since the number of test pins utilized during a test operation can be selectively reduced for low frequency tests.


