Memory Output Driver Dynamic Resistance Control

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Solution Overview

Problem

As memory device operation speeds increase, signal distortion due to impedance mismatch worsens, and existing technologies fail to effectively detect and repair defective resistors in output drivers, leading to reduced signal integrity.

Innovation Solution

A semiconductor memory device with a mode register that stores codes for disabling defective resistors and enabling repair resistors, allowing for dynamic adjustment of pull-up and pull-down units to match termination resistance, thereby maintaining signal integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If operation speed of the memory device is increased, then productivity is improved, but signal distortion due to impedance mismatch worsens

Engineering Contradiction:
Improveoperation speedVSAvoidsignal integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies dynamics by making the output driver's resistance adjustable rather than fixed. The resistance value can be dynamically changed based on the operating mode (e.g., high-speed vs. low-speed operations) to optimize signal integrity at each speed level, resolving the contradiction between achieving high productivity and maintaining signal reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the resistance parameter of the output driver to match different termination resistance values required at different operation speeds. By adjusting this electrical parameter, the system maintains impedance matching across varying productivity levels, preventing signal distortion while enabling high-speed operations.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If termination resistance is adjusted to match impedance, then signal distortion is reduced, but device complexity increases due to multiple resistors and control logic

Engineering Contradiction:
Improvesignal integrityVSAvoidoutput driver structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the output driver into multiple parallel resistor units (first resistor, second resistor, third resistor, fourth resistor) that can be independently controlled. This segmentation allows the system to achieve different termination resistance values by selectively enabling or disabling specific resistor combinations, balancing signal integrity with manageable structural complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a multi-functional output driver where a single circuit structure can serve multiple purposes by adjusting resistance values. The same resistor network can provide different termination impedances for different operation modes, eliminating the need for separate dedicated circuits for each function and reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If multiple resistors are used to achieve precise termination resistance, then manufacturing precision is improved, but ease of manufacture deteriorates due to additional control logic and mode registers

Engineering Contradiction:
Improvetermination resistance matchingVSAvoidfabrication process
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent uses dynamic control through mode registers and control logic to achieve precise termination resistance matching without requiring extremely tight manufacturing tolerances on individual resistor values. The system compensates for manufacturing variations by dynamically adjusting which resistors are active, making the fabrication process more tolerant while maintaining precision.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20240249788A1Memory device
Publication Date: 2024.07.25 SAMSUNG ELECTRONICS CO LTD
  • US20240249788A1 patent drawing
  • US20240249788A1 patent drawing
  • US20240249788A1 patent drawing

AI summary

A memory device includes a mode register configured to store a first code for indicating termination resistance of the memory device and a second code for disabling a defective resistor, and an output driver including a plurality of pull-up units including a plurality of pull-up resistors and a plurality of pull-down units including a plurality of pull-down resistors. The output driver is configured to disable or enable respective pull-up resistors and pull-down resistors based on the second code, enable a subset of pull-up units from among the plurality of pull-up units including the respective pull-up resistors based on the first code, and enable a subset of pull-down unit from among the plurality of pull-down units including the respective pull-down resistors based on the first code.