Memory I/O Circuit Using Data-Pattern Resistance Control
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Solution Overview
Problem
As electronic devices miniaturize, the increasing amount of data processed by memory devices leads to a need for reducing current consumption while maintaining performance, which existing memory devices have not effectively addressed.
Innovation Solution
An input/output circuit that detects data patterns to control resistance, generating up and down resistance control codes to adjust internal resistance for efficient data amplification and output, thereby reducing power consumption and enhancing performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the memory device processes increasing amounts of data, then the data processing capacity is improved, but the current consumption increases
Solution Approach 1:
The output circuit dynamically adjusts its resistance based on the detected data pattern. When consecutive data patterns are detected, the circuit switches to a high-resistance state to reduce current consumption. When non-consecutive patterns are detected, it switches to a low-resistance state to maintain signal integrity and processing speed. This dynamic adaptation allows the memory device to handle increasing data volumes while optimizing power usage according to actual data characteristics.
Solution Approach 2:
The invention changes the resistance parameter of the output circuit based on the data pattern being processed. By detecting whether data follows a consecutive pattern and accordingly adjusting the resistance value (high resistance for consecutive patterns, low resistance for non-consecutive patterns), the system optimizes the balance between current consumption and data processing performance, enabling higher data throughput without proportionally increasing power consumption.
2Productivity
If the resistance of the output circuit is reduced to improve signal amplification, then the data output performance is improved, but the current consumption increases
Solution Approach 1:
The output circuit employs dynamic resistance switching based on data pattern detection. The circuit monitors incoming data for consecutive patterns and automatically adjusts its resistance state accordingly. This dynamic behavior enables the circuit to maintain low resistance (high performance) only when necessary for signal amplification, while switching to high resistance (low power) mode when data patterns indicate lower processing demands, thus resolving the contradiction between performance and power consumption.
Solution Approach 2:
The resistance parameter of the output circuit is changed based on the detected data pattern characteristics. When consecutive data patterns are detected, the resistance is increased to reduce current consumption. When non-consecutive patterns requiring stronger signal amplification are detected, the resistance is decreased to improve data output performance. This conditional parameter adjustment optimizes the trade-off between power consumption and output performance.
Data Source
AI summary
An input/output circuit for use in a memory includes: a data pattern detector for outputting an up resistance control code and a down resistance control code according to whether the pattern of consecutively input data is a consecutively varied pattern or an inconsecutively varied pattern; and an output circuit for controlling resistance in response to the up resistance control code and the down resistance control code, and amplifying the data and then outputting the amplified data to an input/output pad.