Memory Output Timing Control for Voltage Discharge Delays

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Solution Overview

Problem

As memory devices integrate more densely, the time required to discharge voltage from internal circuits increases, degrading performance and reducing data output speed.

Innovation Solution

Incorporating a delay information storage and operation controller to manage data output timing, allowing the memory device to delay data transmission until after voltage discharge is complete, thereby separating discharge and data output operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the integration degree of the memory device is increased, then the data storage capacity is improved, but the voltage discharge time increases and performance degrades

Engineering Contradiction:

Improvedata storage capacityVSAvoidvoltage discharge time

Core Design Contradiction:

Quantity of substanceVSLoss of time

Solution Approach 1:

The patent segments the memory device into multiple banks (first bank and second bank) that can operate independently. While one bank is performing voltage discharge operations, the other bank can simultaneously perform data output operations. This bank-based segmentation allows parallel processing of different operations, thereby reducing the overall voltage discharge time impact on data output performance while maintaining high storage capacity through increased integration.

Inventive Principle:

Principle #1Segmentation

2Speed

If the data input/output speed is increased, then the data output time is reduced, but the voltage discharge time becomes a limiting factor and performance degrades

Engineering Contradiction:

Improvedata input/output speedVSAvoidvoltage discharge time

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The patent ensures continuous useful action by implementing a mechanism where data output operations can proceed continuously without being blocked by voltage discharge operations. The operation controller monitors the voltage discharge status and only delays data output when necessary, otherwise allowing continuous high-speed data transmission. This minimizes the impact of voltage discharge time on overall data I/O speed and maintains sustained performance.

Inventive Principle:

Principle #20Continuity of useful action

3Quantity of substance

If the memory device integrates more densely, then the storage capacity is improved, but the interference between discharge operations and data output increases

Engineering Contradiction:

Improvestorage capacityVSAvoidinterference between discharge operations and data output

Core Design Contradiction:

Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an operation controller as an intermediary component that manages the coordination between voltage discharge operations and data output operations. This controller acts as a mediator that monitors the status of both operations and makes intelligent decisions about timing and sequencing. It can delay data output temporarily when voltage discharge is in progress, or switch to another bank that is ready for data output, thereby eliminating harmful interference while maintaining high storage capacity through dense integration.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12524156B2Memory device for controlling data output time

Publication Date: 2026.01.13 SK HYNIX INC

AI summary

A memory device comprises a memory cell, a delay information storage configured to store delay information associated with a time at which data stored in the memory cell is output, and an operation controller configured to output the data to an external device after delaying a time corresponding to the delay information from a time of discharging a voltage provided to the memory cell.