Memory Overflow Handling in Real-Time Spectrum Analyzers

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Solution Overview

Problem

Real-time spectrum analyzers require fast and large memory for high-rate read-modify-write operations, but implementing such memory is expensive and not feasible for non-real-time applications, leading to a need for cost-effective solutions that maintain high memory performance.

Innovation Solution

A system comprising a fast first memory, an overflow detector, a slower second memory, and a third memory to temporarily buffer overflow data, allowing for the combination of data from both memories to produce an output stream, thereby reducing the need for extensive fast memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a fast large histogram memory is implemented using FPGA BlockRAM, then the memory performance is sufficient for real-time spectrum analyzer operations, but the cost becomes very expensive

Engineering Contradiction:
Improvememory operating rateVSAvoidcost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The memory system is segmented into two distinct parts: a fast first memory (FIFO) for real-time operations and a slower second memory for overflow handling. This segmentation allows each memory component to be optimized for its specific function, using cheaper slower memory for the overflow portion while maintaining fast memory performance for the critical real-time path.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A third memory component acts as an intermediary buffer between the fast first memory and the slower second memory. This intermediary handles the rate mismatch by temporarily storing overflow data, allowing the fast memory to operate at high speed while the slower memory processes data at its own pace without blocking the real-time operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If the histogram memory capacity is increased to avoid data overflow, then the memory capacity is sufficient for large range histogram entries, but the memory cost and complexity increase

Engineering Contradiction:
Improvememory capacityVSAvoidcost
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The memory capacity is segmented between two memory components: the first memory handles the primary histogram storage with fast access, while the second memory provides additional capacity for overflow data. This allows the system to achieve large total capacity without requiring a single expensive large-capacity fast memory.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses cheaper slower memory for the overflow handling portion, accepting that this memory will handle data that is less critical for real-time processing. The overflow memory acts as a buffer for data that can be processed at a lower priority, reducing the need for expensive high-capacity fast memory.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Speed

If a single memory system is used to provide both fast performance and large capacity, then the memory performance is sufficient for real-time operations, but the device complexity and cost increase

Engineering Contradiction:
Improvememory operating rateVSAvoidmemory system complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The memory system is divided into functionally distinct segments: a fast first memory for real-time histogram operations and a slower second memory for overflow data. This segmentation allows each component to be simpler and cheaper, optimized for its specific function rather than requiring a single complex high-performance system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A third memory component serves as an intermediary buffer between the fast and slow memory systems. This intermediary simplifies the overall architecture by providing a dedicated buffer zone that handles rate mismatches, allowing the fast and slow memories to operate independently without direct complexity interactions.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8788727B1Electronic system subject to memory overflow condition
Publication Date: 2014.07.22 KEYSIGHT TECHNOLOGIES INC
  • US8788727B1 patent drawing
  • US8788727B1 patent drawing
  • US8788727B1 patent drawing

AI summary

A method of operating an electronic system comprises storing information corresponding to an input data stream in a first memory having a first operating rate, detecting an overflow condition of the first memory, generating overflow information in response to the detection of the overflow condition, storing the overflow information in a second memory having a second operating rate slower than the first operating rate, transferring the overflow information from the detector to a third memory at a first transfer rate corresponding to the first operating rate, temporarily storing the overflow information in the third memory, and transferring the stored overflow information to the second memory at a second transfer rate corresponding to the second operating rate, and combining the information stored in the first memory with the overflow information stored in the second memory to produce an output data stream.