Memory Device Conditioning via Peer-to-Peer Fabric Transfers

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Solution Overview

Problem

Existing memory device testing systems are costly and complex due to the need for multiple host devices to load data sequentially, leading to reduced throughput and inefficiency.

Innovation Solution

A single host device uses peer-to-peer transfers to efficiently load data onto multiple memory devices, reducing system complexity and cost by propagating data through peer-to-peer operations within a fabric configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple host devices are used to load data onto memory devices, then data loading capacity is improved, but system complexity and cost increase

Engineering Contradiction:
Improvedata loading capacityVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments the data loading function by introducing intermediate memory devices that act as data distribution nodes. The host device loads data to a first memory device, which then segments and propagates data to multiple second memory devices through peer-to-peer transfers, dividing the data loading task across multiple memory devices rather than requiring multiple host devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first memory device serves as an intermediary between the host device and multiple second memory devices. It receives data from the host and facilitates peer-to-peer transfers to propagate data to other memory devices, eliminating the need for multiple host devices while maintaining data loading capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple host devices are used to load data onto memory devices, then data loading capacity is improved, but cost increases

Engineering Contradiction:
Improvedata loading capacityVSAvoidsystem cost
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

Memory devices are given multiple functions: they not only store data but also act as data distribution nodes for peer-to-peer transfers. This multi-functionality allows a single host device to efficiently condition numerous memory devices, reducing the need for additional host devices and associated costs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Memory devices perform self-service by autonomously receiving data from the host and propagating it to other memory devices through peer-to-peer transfers without requiring direct host intervention for each device, reducing system cost while maintaining productivity.

Inventive Principle:
Principle #25Self-service

3Device complexity

If data is loaded sequentially onto memory devices, then system complexity is reduced, but throughput decreases

Engineering Contradiction:
Improvesystem complexityVSAvoidtesting throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The system achieves continuous useful action through parallel peer-to-peer data propagation. While the host device loads data to the first memory device, that memory device simultaneously propagates data to multiple second memory devices, eliminating idle time and maintaining continuous data loading across the entire memory device array, thereby increasing throughput without increasing complexity.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The first memory device performs preliminary data reception and preparation, then initiates peer-to-peer transfers to propagate data to other memory devices before the host device needs to load data to those devices sequentially, enabling parallel operation and increased throughput.

Inventive Principle:
Principle #10Preliminary action

4Device complexity

If sequential data loading is used, then system simplicity is maintained, but time consumption increases

Engineering Contradiction:
Improvesystem simplicityVSAvoiddata loading time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The data loading process is segmented into parallel operations: the host device loads data to the first memory device while that memory device simultaneously segments and propagates data to multiple second memory devices through peer-to-peer transfers, reducing total data loading time without significantly increasing system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first memory device acts as an intermediary that accelerates the data loading process by receiving data from the host and simultaneously distributing it to multiple second memory devices through peer-to-peer transfers, reducing the time required to load data across all memory devices while maintaining system simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250208963A1Conditioning memory devices for testing using peer-to-peer transfers
Publication Date: 2025.06.26 MICRON TECHNOLOGY INC
  • US20250208963A1 patent drawing
  • US20250208963A1 patent drawing
  • US20250208963A1 patent drawing

AI summary

In some implementations, a device may cause a single host device to load data to a first memory device of a plurality of memory devices configured in a fabric. The device may cause the first memory device to propagate the data to one or more second memory devices, of the plurality of memory devices, via one or more peer-to-peer transfer operations to replicate the data from the first memory device to the one or more second memory devices without involvement of the single host device.