Memory Package Resistors for DDR4 Signal Integrity

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Solution Overview

Problem

DDR4 or LDDR4 DRAM memory packages under 20 nm processes experience signal distortion, particularly overshoot or undershoot phenomena in high-frequency data signals above 2933 MHz, which existing technologies have not effectively addressed.

Innovation Solution

A memory package structure incorporating a substrate with resistors connected between data pins and bonding pads on a memory chip, where each resistor has a resistance less than 100 ohms, to reduce signal distortion by stabilizing data signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high-frequency data signals are used to increase data transmission speed, then productivity is improved, but signal distortion including overshoot or undershoot phenomenon occurs

Engineering Contradiction:
Improvedata transmission speedVSAvoidsignal quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces resistors as intermediary components connected between the memory chip bonding pads and the substrate pins. These resistors act as mediators that dampen signal oscillations and reduce overshoot/undershoot phenomena in high-frequency data signals, thereby maintaining signal quality while enabling high-speed data transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the electrical parameters of the signal transmission path by introducing resistors with specific resistance values (e.g., 50 ohms, 100 ohms) into the data signal path. This parameter change alters the signal characteristics, reducing high-frequency oscillations and improving signal integrity without significantly impacting data transmission speed.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If resistors are added to reduce signal distortion, then signal quality is improved, but device complexity increases

Engineering Contradiction:
Improvesignal qualityVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the resistors with the substrate structure, integrating them into the existing memory package architecture. The resistors are positioned and connected within the substrate, combining multiple functions (signal transmission, signal conditioning) into a unified structure, thereby reducing overall device complexity despite adding functional components.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The resistors are designed to automatically perform signal conditioning functions without requiring external control or adjustment. They self-regulate the signal characteristics through their inherent resistance properties, eliminating the need for additional control circuits or complex adjustment mechanisms.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The resistors in the memory package structure effectively reduce overshoot and undershoot phenomena, improving data signal transmission quality and preventing errors in reading and writing processes by stabilizing the waveform of high-frequency data signals.

Implementation Method 1

A plurality of bonding pads is located on the memory chip. The bonding pads include a plurality of data pads used to receive the data signal from data pins or transfer the data signal from the memory chip. The resistors are located on the substrate. Each data pad is connected to a corresponding one of the data pins through a corresponding one of the resistors.

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS11322467B2Memory package structure
Publication Date: 2022.05.03 NAN YA TECH
  • US11322467B2 patent drawing
  • US11322467B2 patent drawing
  • US11322467B2 patent drawing

AI summary

A memory package structure includes a substrate, a memory chip and a plurality of resistors. The substrate has a plurality of pins. The pins include a plurality of data pins used to transfer data signal. The memory chip is located on the substrate. A plurality of bonding pads is located on the memory chip. The bonding pads include a plurality of data pads used to receive the data signal from data pins or transfer the data signal from the memory chip. The resistors is located on the substrate. Each data pad is connected to a corresponding one of the data pins through a corresponding one of the resistors.