Memory Pad Layout With Dual-Side Probe Access for Unified Testing
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Solution Overview
Problem
Current memory device layouts require separate testing configurations for one-channel and two-channel devices, increasing testing complexity and equipment costs, as existing layouts do not allow for efficient electrical coupling and impedance reduction across both types.
Innovation Solution
The proposed layouts for memory devices include conductive lines and probe pads on both sides of the device, allowing a single probe to test both one-channel and two-channel devices, with inter-pad and inter-line conductive lines that reduce electrical impedance and improve coupling, enabling the same probe to test both configurations without reconfiguration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate testing configurations are used for one-channel and two-channel memory devices, then testing can be performed for each device type, but testing complexity and equipment costs increase
Solution Approach 1:
The patent applies universality by designing a single probe structure that can test both one-channel and two-channel memory devices. The probe includes conductive lines configured to electrically couple to bond pads on either side of the memory device, allowing the same probe to serve multiple testing functions without requiring separate testing configurations for different device types.
2Reliability
If separate testing configurations are used for one-channel and two-channel memory devices, then each device type can be tested appropriately, but equipment costs increase
Solution Approach 1:
The probe is designed with universal functionality to test both one-channel and two-channel memory devices using the same equipment. The conductive lines can be configured to connect to bond pads on either side of the device, eliminating the need for separate probes or testing equipment for different device types.
3Ease of manufacture
If traditional layouts are used without inter-line conductive lines, then manufacturing is simpler, but electrical impedance is higher and coupling is poorer
Solution Approach 1:
The patent introduces inter-line conductive lines as intermediary elements that electrically couple bond pads on opposite sides of the memory device. These conductive lines act as mediators to improve electrical coupling and reduce impedance between the bond pads, while the overall layout remains compatible with standard manufacturing processes.
Data Source
AI summary
Layouts for pads and conductive lines of memory devices are disclosed. A memory device may include memory cells and conductive lines arranged above memory cells. The conductive lines may extend from substantially a first side of the memory device to substantially a second side of the memory device. Each of the conductive lines may be electrically coupled to a bond pad, a first probe pad and a second probe pad. The bond pad may be positioned at or near the first side and be configured to receive power. The first probe pad may be positioned at or near the first side and be configured to be electrically coupled to a probe. The second probe pad may be positioned at or near the second side. Associated systems and methods are also disclosed.