Memory Page Allocation Across Rank Groups to Reduce Switching Overhead

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Solution Overview

Problem

The existing memory allocation method in computer systems leads to reduced data access rates due to memory pages being concentrated in one rank, resulting in inefficient activation of ranks during memory access processes.

Innovation Solution

The method involves distributing storage units of a memory page across multiple ranks based on specific allocation policies and selecting idle memory pages from rank groups with high access traffic to minimize rank switching overheads, allowing for the activation of multiple ranks during memory access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If memory pages are allocated to one application program using conventional methods, then memory allocation is simple, but memory pages become concentrated in one rank, reducing data access rate

Engineering Contradiction:
Improvememory allocation simplicityVSAvoiddata access rate
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The memory system is segmented into multiple rank groups, each containing multiple ranks. Memory pages are allocated across different rank groups rather than concentrating all pages in a single rank, enabling parallel activation of multiple ranks to improve data access rate while maintaining allocation simplicity through structured organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different rank groups are utilized based on local access patterns and traffic characteristics. The processor selects specific rank groups for allocation based on their current state and performance characteristics, optimizing data access rate by leveraging the unique properties of each rank group rather than treating all ranks uniformly.

Inventive Principle:
Principle #3Local quality

2Device complexity

If the memory controller activates one rank at a time, then control is simplified, but the data access rate is reduced

Engineering Contradiction:
Improvememory controller complexityVSAvoiddata access rate
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory controller dynamically activates multiple ranks simultaneously based on real-time access patterns and traffic requirements. Instead of following a fixed single-rank activation scheme, the controller adapts its activation strategy to optimize data access rate while managing complexity through dynamic resource allocation rather than static configuration.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The memory controller is designed to perform multiple functions: it can activate one rank at a time for simple access patterns, or simultaneously activate multiple ranks across different rank groups for high-performance scenarios. This multi-functional capability allows the controller to optimize between simplicity and data access rate based on actual system needs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If any idle memory page is used for allocation, then allocation flexibility is high, but rank switching overheads increase

Engineering Contradiction:
Improveallocation flexibilityVSAvoidrank switching overheads
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The system performs preliminary selection of rank groups based on access traffic characteristics before actual memory page allocation. By pre-identifying suitable rank groups with appropriate access patterns, the system reduces the likelihood of subsequent rank switching during page access, thereby minimizing rank switching overheads while maintaining allocation flexibility through the pool of pre-identified candidate rank groups.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory allocation process incorporates feedback from access traffic monitoring of different rank groups. The processor continuously monitors access patterns and uses this feedback to dynamically select idle memory pages from rank groups that are likely to minimize future rank switching, thus reducing rank switching overheads while preserving allocation flexibility through adaptive decision-making.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3534264B1Memory allocation method and apparatus
Publication Date: 2024.05.22 HUAWEI TECH CO LTD
  • EP3534264B1 patent drawingFigure 1
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  • EP3534264B1 patent drawingFigure 3

AI summary

A memory allocation method and a device are provided, where the method is applied to a computer system including a processor and a memory. The memory includes at least two rank groups, each rank group includes at least two ranks, first portions of address information in addresses of ranks in one rank group are the same, there is a mapping relationship between the first portion of address information and information about a first preset location in a physical address of a memory page, and the first preset location is a portion of page number information in the physical address. The method includes: receiving, by the processor, a memory access request carrying a to-be-accessed virtual address; when determining that no memory page has been allocated to the virtual address, selecting a target rank group from the at least two rank groups based on access traffic of the rank groups; and selecting, from idle memory pages, a to-be-allocated memory page for the memory access request, where information about a first preset location in a physical address of the to-be-allocated memory page is the same as first portions of address information in addresses of ranks in the target rank group.