Semiconductor Memory Page Buffer Bit Line Voltage Control
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Solution Overview
Problem
Semiconductor memory devices face reliability issues during read operations due to large currents flowing to the common source line, which can unintentionally increase voltage and reduce the reliability of data retrieval.
Innovation Solution
A semiconductor memory device with a page buffer that selectively biases the bit line to maintain its voltage at or higher than a reference voltage, using current passages to supply or release current as needed, and a sensing node to detect data based on voltage comparisons, ensuring consistent voltage levels during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a read operation is performed to retrieve data from memory cells, then data can be read, but a large current flows to the common source line which unintentionally increases voltage and reduces reliability
Solution Approach 1:
A bit line is introduced as an intermediary component between the memory cells and the common source line. The bit line acts as a mediator that controls and regulates the current flow, preventing large currents from directly increasing the common source line voltage while still enabling data read operations.
Solution Approach 2:
The voltage level of the bit line is dynamically adjusted during the read operation. The bit line voltage is raised to a higher level to enable current flow through memory cells with higher threshold voltages, while this voltage change is contained to the bit line and does not propagate to the common source line, thus preventing unintended voltage increase.
2Adaptability or versatility
If the bit line voltage is increased to read data from memory cells with higher threshold voltages, then more memory cells can be read, but the voltage increase may affect data accuracy
Solution Approach 1:
The voltage control is segmented and localized to the bit line only. By confining the voltage increase to the bit line segment and using it temporarily during the read operation, the system can read memory cells with various threshold voltages without permanently affecting the common source line voltage or compromising data accuracy.
Solution Approach 2:
The bit line voltage is temporarily raised during the read operation and then restored to its original level. This periodic voltage change enables the system to read memory cells with higher threshold voltages while maintaining data accuracy, as the voltage increase is transient and controlled.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of read operations by maintaining stable voltage levels, preventing unintended voltage increases and improving data accuracy.
Implementation Method 1
the page buffer may include current passages coupled to the bit line and supplies a reference current to the bit line via at least one of the current passages when the voltage of the bit line is lower than the reference voltage
Implementation Method 2
The current of the bit line may be reflected in the voltage of the sensing node
Data Source
AI summary
A semiconductor memory device may include a common source line controller configured to provide a channel current to a cell string via a common source line during a read operation and a page buffer configured to detect data stored in a selected memory cell by detecting a current of the bit line when the channel current is provided. The page buffer may selectively bias the bit line to maintain a voltage of the bit line to be the same as or higher than a reference voltage.