Memory Page Buffer Control Circuit Probing Method

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Solution Overview

Problem

Existing memory devices face challenges in efficiently checking page buffer signals due to the limited number of pads available, which restricts the ability to probe and measure page buffer control signals effectively, especially in package-type memory devices.

Innovation Solution

A memory device and operating method that utilize a control circuit with probing pads and a measuring pad to generate and control page buffer control signals, allowing for the probing and measurement of page buffer control signal groups through reduced or minimum pads, enabling parallel operation and signal analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional memory devices use limited pads for signal checking, then the device structure remains simple, but the ability to probe and measure page buffer control signals is restricted

Engineering Contradiction:
Improveability to probe and measure page buffer control signalsVSAvoiddevice structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The control circuit is segmented into multiple functional units including a probing pad unit with first probing pad and second probing pad, a measuring pad unit with third probing pad, and a control signal generating unit. This segmentation allows each unit to perform specific functions (probing different signal groups, measuring results) independently, enabling comprehensive signal checking with minimal pads while maintaining clear functional separation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The probing pads and measuring pad serve multiple functions: they can probe different page buffer control signal groups (first group via first probing pad, second group via second probing pad), perform measurements on probed signals, and work in coordination with the control signal generating unit. This multi-functionality allows the limited pads to handle comprehensive signal verification tasks that would otherwise require many more dedicated pads

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple pads are used to check all page buffer signals, then complete signal verification is achieved, but the number of required pads increases significantly

Engineering Contradiction:
Improvesignal verification completenessVSAvoidnumber of pads
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges the functions of multiple potential pads into a small set of multi-functional pads. The first and second probing pads can probe different signal groups, the third probing pad measures results, and these pads work in combination with the control signal generating unit to achieve complete signal verification. This merging reduces the total pad count from what would be needed for dedicated one-to-one signal-pad mapping

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The control signal generating unit generates page buffer control signals in a periodic or sequential manner, enabling the probing pads to probe different signal groups at different times. This periodic action allows the same physical pads to verify multiple signals across different page buffer stages sequentially, achieving complete verification without requiring simultaneous access to all signals through separate pads

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11742023B2Memory device and operating method thereof
Publication Date: 2023.08.29 SK HYNIX INC
  • US11742023B2 patent drawing
  • US11742023B2 patent drawing
  • US11742023B2 patent drawing

AI summary

A memory device includes a page buffer circuit including a plurality of page buffer stages each including a plurality of page buffers. The memory device also includes a control circuit configured to generate page buffer control signals for controlling the plurality of page buffers. The control circuit is also configured to probe each of a plurality of page buffer control signal groups configured with the page buffer control signals through a probing path corresponding to each of the plurality of page buffer control signal groups.