Nonvolatile Memory Page Buffer Verification Current Reduction
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Solution Overview
Problem
Existing nonvolatile memory devices consume excessive current during program verification operations due to the precharge of bit lines for program-inhibited cells, leading to device malfunctions and increased power consumption.
Innovation Solution
A method and apparatus for performing program verification operations in nonvolatile memory devices that skip the precharge operation for bit lines coupled to program-inhibited cells, controlling the voltage level of a sense node in response to program data to reduce current consumption, by precharging or maintaining the sense node at a high voltage level for programmed cells and discharging it for unprogrammed cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If bit line precharge operation is performed for all memory cells during program verification, then verification accuracy is maintained, but current consumption increases excessively
Solution Approach 1:
The patent applies local quality by differentiating the treatment of memory cells based on their program state. Program-inhibited cells are identified and excluded from the precharge operation, while only cells requiring programming undergo the full verification process. This selective approach maintains verification accuracy for relevant cells while reducing unnecessary current consumption from inhibited cells.
Solution Approach 2:
The patent segments the memory cell population into two distinct groups: program-inhibited cells and cells requiring programming. By separating these groups and applying different verification procedures, the system achieves both accurate verification of target cells and reduced power consumption by excluding inhibited cells from the high-current precharge operation.
2Productivity
If bit line precharge operation is performed for program-inhibited cells, then verification operation can be completed, but device malfunction occurs due to excessive discharged current
Solution Approach 1:
The patent extracts program-inhibited cells from the general verification process by identifying them through program data analysis. These inhibited cells are removed from the set of cells undergoing bit line precharge, preventing the excessive current discharge that would cause device malfunction while allowing the verification operation to complete successfully for the remaining cells.
3Reliability
If multiple sense nodes and bit lines are always precharged to prevent malfunction, then device reliability is maintained, but current consumption increases
Solution Approach 1:
The patent implements a dynamic precharge strategy where the decision to precharge bit lines and sense nodes is made on-demand based on the specific verification requirements. Instead of maintaining continuous precharge states, the system dynamically activates precharge only for bit lines associated with cells requiring programming, thereby maintaining device reliability while minimizing current consumption.
Data Source
AI summary
A method of performing a program verification operation in a nonvolatile memory device includes storing program data, programmed into a selected memory cell of a memory cell block, in a page buffer which is coupled to a bit line of the memory cell block via a sense node, controlling a voltage level of the sense node in response to a value of the program data, changing the voltage level of the sense node in response to a program state of the selected memory cell coupled to the bit line, and performing a program verification operation on the selected memory cell by sensing the voltage level of the sense node.