Memory Page Buffer Parallel Data Output

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Solution Overview

Problem

The existing memory devices face delays in read operations due to the need to output both hard decision data and soft decision data to the memory controller, which increases the time required for data output and can lead to performance degradation.

Innovation Solution

The proposed memory device includes a page buffer with buffer units that store hard decision data and soft decision data separately, and a control logic that allows for the output of hard decision data after the start of a second read operation, while soft decision data is output during the second read operation, thereby reducing the overall data output time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hard decision data and soft decision data are output together to the memory controller, then error correction capability is improved, but data output time increases and read speed deteriorates

Engineering Contradiction:
Improveerror correction capabilityVSAvoidread speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent segments the data output process by separating hard decision data and soft decision data into different output streams. Hard decision data is output first through a normal read operation, while soft decision data is output later through an offset read operation, allowing parallel processing and reducing the time penalty of outputting both data types

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by preparing soft decision data in advance during the normal read operation. The offset read level is pre-configured and soft decision data is read and stored in the page buffer during the same time hard decision data is being processed, so that both data types are ready for simultaneous or overlapping output to the memory controller

Inventive Principle:
Principle #10Preliminary action

2Loss of information

If hard decision data and soft decision data are output together, then data completeness is improved, but delay between read operations increases

Engineering Contradiction:
Improvedata completenessVSAvoiddelay between read operations
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The patent maintains continuity of useful action by overlapping the output of hard decision data with the reading of soft decision data. While the memory controller is receiving hard decision data from the first page, the memory device is simultaneously performing the offset read operation to read soft decision data from the first page and prepare it for output, eliminating idle time and ensuring continuous data flow

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20250053302A1Memory device
Publication Date: 2025.02.13 SAMSUNG ELECTRONICS CO LTD
  • US20250053302A1 patent drawing
  • US20250053302A1 patent drawing
  • US20250053302A1 patent drawing

AI summary

An example memory device includes a memory cell array, a page buffer including buffer units corresponding to a plurality of memory cells of a page, a control logic configured to control a first read operation such that first hard decision data based on a normal read level and first soft decision data based on an offset level with respect to a first page are stored in the page buffer. The control logic is configured to perform a control operation of outputting the first hard decision data to a memory controller after a second read operation with respect to a second page has started in response to a first command that requests read of the second page from the memory controller and outputting the first soft decision data to the memory controller while the second read operation is being performed in response to a second command from the memory controller.