Memory Device Page Buffer Sensing Node Defect Detection

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Solution Overview

Problem

Memory devices face performance reduction due to defects in sensing nodes, which existing technologies fail to effectively detect and manage, leading to potential data loss and operational inefficiencies.

Innovation Solution

A memory device and method that involve a page buffer with a test performer to apply sequential first and second test voltages to a sensing node, detecting defects based on potential level changes, and providing test data to an external controller for management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If no defect detection mechanism is implemented, then device complexity is reduced, but reliability deteriorates due to undetected sensing node defects

Engineering Contradiction:
Improvesensing node reliabilityVSAvoidpage buffer structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a test voltage application mechanism that proactively tests sensing nodes before they cause data loss. The test performer applies test voltages to sensing nodes during manufacturing or initialization, allowing defects to be detected and managed in advance, thereby improving reliability without requiring complex continuous monitoring systems.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a test voltage transfer component as an intermediary element between the bit line and sensing node. This component enables the application of test voltages to sensing nodes without requiring direct modification of the sensing node structure itself, thus improving reliability while adding minimal complexity to the overall device architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of information

If defective sensing nodes are not managed, then ease of operation is maintained, but loss of information occurs due to data loss from defective nodes

Engineering Contradiction:
Improvedata lossVSAvoidoperation simplicity
Core Design Contradiction:
Loss of informationVSEase of operation

Solution Approach 1:

The patent implements a feedback mechanism where the test performer detects changes in sensing node potential levels during voltage testing. When a sensing node shows abnormal response to test voltages, the system identifies it as defective and manages it accordingly, preventing data loss while maintaining simple operation through automated detection and management.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent extracts the defect detection function from the main memory operation flow by implementing a separate test voltage application and potential level monitoring mechanism. This allows defective sensing nodes to be identified and managed independently without complicating normal memory operations, thus preventing data loss while maintaining ease of operation.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If sequential voltage testing is performed, then measurement precision of sensing node defects is improved, but use of energy increases

Engineering Contradiction:
Improvesensing node defect detection precisionVSAvoidenergy consumption during testing
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies test voltages to sensing nodes in a sequential and periodic manner rather than continuously. The test performer applies voltages in discrete steps, measures potential level changes, and then moves to the next sensing node, thereby achieving precise defect detection while minimizing energy consumption through intermittent testing rather than continuous monitoring.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11462285B2Memory device and method of operating the memory device
Publication Date: 2022.10.04 MIMIRIP LLC
  • US11462285B2 patent drawing
  • US11462285B2 patent drawing
  • US11462285B2 patent drawing

AI summary

The present technology relates to an electronic device. For example, the present technology relates to a memory device and a method of operating the memory device. A memory device according to an embodiment includes a memory cell, a page buffer, and a test performer configured to control the page buffer to sequentially apply a first test voltage and a second test voltage of a level lower than a level of the first test voltage to a sensing node of the page buffer through a bit line, and detect a defect of the sensing node according to whether a potential level of the sensing node is changed.