Memory Page Compression via Pattern Detection and Deallocation

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Solution Overview

Problem

Existing memory management systems struggle to efficiently compress and manage memory contents, leading to suboptimal use of physical memory and increased access times.

Innovation Solution

A memory node system that maintains a page table mapping host physical addresses to device physical addresses, allowing for compression of memory pages by identifying and dealing with pages containing predefined patterns, thereby reducing physical memory allocation and access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory pages are compressed by identifying and deallocating pages with repetitive patterns, then memory usage efficiency is improved, but memory access time increases due to pattern detection overhead

Engineering Contradiction:
Improvememory usage efficiencyVSAvoidmemory access time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The system performs pattern detection and compression in advance during memory write operations or idle periods, so that when read operations occur, the compressed data is already prepared and ready for quick retrieval. This preliminary compression action shifts the processing burden away from the critical read path, reducing access time while maintaining high memory usage efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary compression layer between the host and physical memory devices. This intermediary layer handles pattern detection and data transformation, allowing the host to access memory through a simplified interface while the intermediary manages the complex compression/decompression operations, thereby balancing efficiency gains with access performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If pattern detection is performed on all memory pages, then compression ratio is improved, but processing complexity increases

Engineering Contradiction:
Improvecompression ratioVSAvoidprocessing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The system applies different processing strategies to different memory pages based on their characteristics. Pages with high repetitiveness undergo full pattern detection and compression, while pages with low repetitiveness are left uncompressed or use simpler encoding schemes. This local differentiation optimizes compression ratio for suitable pages while avoiding unnecessary processing complexity for pages that don't benefit from compression.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent dynamically adjusts compression parameters such as pattern detection depth, threshold values, and algorithm selection based on the actual content characteristics of each memory page. By changing these parameters adaptively, the system achieves high compression ratios for compressible data while reducing processing complexity for data that is already diverse or random.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12204446B2Compression via deallocation
Publication Date: 2025.01.21 RAMBUS INC
  • US12204446B2 patent drawing
  • US12204446B2 patent drawing
  • US12204446B2 patent drawing

AI summary

A buffer/interface device of a memory node reads a block of data (e.g., page). As each unit of data (e.g., cache line sized) of the block is read, it is compared against one or more predefined patterns (e.g., all 0's, all 1's, etc.). If the block (page) is only storing one of the predefined patterns, a flag in the page table entry for the block is set to indicate the block is only storing one of the predefined patterns. The physical memory the block was occupying may then be deallocated so other data may be stored using those physical memory addresses.