Memory Page Indexing for Side Channel Attack Mitigation

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Solution Overview

Problem

Devices are susceptible to side channel attacks where attackers can reconstruct secret information by observing access patterns of memory pages and cache lines, compromising security.

Innovation Solution

Indexing multiple memory pages and cache lines based on input data values to create index tables, accessing unrelated cache lines and memory pages during operations, thereby reducing the correlation between access patterns and secret information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If memory pages and cache lines are accessed directly using input data values, then access speed is improved, but security deteriorates because access patterns reveal secret information

Engineering Contradiction:
Improveaccess speedVSAvoidside channel attack vulnerability
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary indexing layer between the input data and memory access. Instead of directly accessing memory using input data values, the system first indexes through multiple levels of index tables to generate intermediate addresses. This intermediary mechanism decouples the direct correlation between input data and memory access patterns, preventing attackers from reconstructing secret information while maintaining efficient access through the indexed structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If multiple memory pages and cache lines are accessed to obscure access patterns, then security is improved, but device complexity increases

Engineering Contradiction:
Improveside channel attack resistanceVSAvoidmemory access structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent segments the memory access structure into multiple hierarchical levels. Instead of a single complex access mechanism, the system divides memory into multiple pages and creates multiple levels of index tables. Each level of segmentation contributes to obscuring the access pattern, and the modular structure allows for systematic management of complexity rather than requiring a single monolithic complex system

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds dimensional complexity by introducing multiple levels of indexing rather than relying on single-dimension memory access. The system creates a multi-layered index structure where each level adds another dimension to the access path. This dimensional approach distributes the security function across multiple layers, making the overall system more secure while keeping each individual layer relatively simple and manageable

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10810136B2Indexing of memory pages to provide secure memory access
Publication Date: 2020.10.20 FORTANIX INC
  • US10810136B2 patent drawing
  • US10810136B2 patent drawing
  • US10810136B2 patent drawing

AI summary

An input data may be received. Memory pages may be identified where each of the memory pages includes one or more cache lines. A first index table that includes cache lines may be generated from the memory pages based on the input data. Subsequently, an output data may be provided based on a particular cache line from the cache lines of the first index table.