Memory Page Marking for Data Integrity During Power Interruption

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Solution Overview

Problem

UCP-EEPROM memories face challenges in writing single bits due to the inability to erase individual bits or bytes, leading to data corruption and integrity issues during power interruptions, especially during tearing attacks, which can result in loss of data integrity and incorrect data storage.

Innovation Solution

A method and apparatus that utilize a marking memory to indicate successful writing to a target memory page, allowing for safe erasure of the initial memory page without data loss, even during power interruptions, by using TearingFlags and a DisturbCounter to manage memory page updates and errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If single bits are written to a memory page in UCP-EEPROM, then data can be updated, but individual bit erasure is not possible leading to data corruption during power interruptions

Engineering Contradiction:
Improvesingle bit writing capabilityVSAvoiddata integrity during power interruption
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The memory system is segmented into multiple memory pages within a sector, with one designated spare page. This allows the system to perform write operations on target pages without requiring buffer storage, as data can be directly written to the spare page instead. The segmentation resolves the contradiction by enabling single bit writing while maintaining data integrity through the spare page mechanism that prevents corruption during power interruptions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The spare page is prepared in advance by erasing it before write operations begin. This preliminary action ensures that when power interruption occurs during a write operation, the data can be safely stored in the pre-prepared spare page without corruption. The MapBlock is also prepared in advance to track the status of each memory page, enabling the system to recover correctly after power failure.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If entire memory page is erased and rewritten to change single bits, then data integrity is maintained, but time-consuming buffering is required

Engineering Contradiction:
Improvedata integrityVSAvoidbuffering time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By segmenting the sector into multiple pages with one spare page, the system eliminates the need to buffer entire pages before erasure. The spare page serves as a direct write target, allowing single bit changes without requiring time-consuming buffering operations. This segmentation approach maintains data integrity while dramatically reducing the time loss associated with buffering.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of buffering and rewriting entire pages, the system copies only the necessary data to the spare page during write operations. This copying mechanism allows single bit changes to be performed efficiently without requiring full page buffering, thus maintaining data integrity while minimizing time loss.

Inventive Principle:
Principle #26Copying

3Adaptability or versatility

If MapBlock and MapAddress are added to track memory pages, then data allocation is improved, but additional memory requirements increase

Engineering Contradiction:
Improvememory page allocation flexibilityVSAvoidmemory space
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The MapBlock and MapAddress structures are implemented with local quality by making them configurable based on the specific application requirements. The system can adjust the size and granularity of these tracking structures to match the actual memory usage patterns, providing flexible allocation while minimizing the additional memory overhead. This allows the system to adapt to different scenarios without always requiring maximum MapBlock overhead.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS7657795B2Method and apparatus for writing to a target memory page of a memory
Publication Date: 2010.02.02 INFINEON TECHNOLOGIES AG
  • US7657795B2 patent drawing
  • US7657795B2 patent drawing
  • US7657795B2 patent drawing

AI summary

A method and apparatus for writing to a target memory page of a memory has an initial memory page having allocated thereto a marking memory containing information whether a content of the initial memory page is written correctly to the target memory page. The apparatus includes a memory controller for determining whether the target memory page has an error, if the target memory page has an error, for erasing it, if the marking memory indicates that the target memory page is not written correctly, for writing the target memory page based on the initial memory page, if the target memory page is written correctly, for changing the marking memory such that the marking memory indicates that the target memory page is written correctly, and if the marking memory of the initial memory page indicates that the target memory page is written correctly, for erasing the initial memory page.