Memory Page Migration in Multi-PPU Systems
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Solution Overview
Problem
In computer systems with multiple parallel processing units (PPUs), migrating memory pages across local memories becomes complex due to the need to update page table entries, which hinders efficient memory access and processing performance.
Innovation Solution
A method is introduced to determine and modify the ownership state of memory pages between PPUs, allowing for the migration of memory pages by updating page table entries, thereby optimizing memory access and processing efficiency by moving pages closer to frequently accessing PPUs and enabling parallel migration techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory pages are migrated among multiple PPU local memories in a unified virtual memory architecture, then memory access efficiency is improved by placing pages closer to accessing PPUs, but the complexity of updating page table entries across multiple PPUs increases
Solution Approach 1:
The patent introduces a memory management unit (MMU) as an intermediary component that mediates memory access requests between PPUs and memory pages. The MMU maintains page tables and handles page table updates automatically, shielding PPUs from the complexity of direct page table management. This intermediary structure allows memory pages to be migrated among PPU local memories while the MMU manages the page table update complexity centrally.
Solution Approach 2:
The patent implements a self-service mechanism where the memory management system automatically tracks and updates page table entries when memory pages are migrated between PPU local memories. The system uses ownership state information and automatic page table update protocols to manage page mappings without requiring manual intervention or complex coordination between multiple PPUs, thereby reducing operational complexity.
2Productivity
If memory pages are kept in PPU local memories for fast access, then processing performance is improved, but memory utilization efficiency decreases when pages are not needed by all PPUs
Solution Approach 1:
The patent implements dynamic memory page management where memory pages can be migrated between PPU local memories based on real-time access patterns and ownership states. The system dynamically adjusts page locations to balance performance and efficiency: pages frequently accessed by specific PPUs are kept in those PPUs' local memories for fast access, while pages not needed by certain PPUs are migrated out to improve overall memory utilization and reduce energy consumption from maintaining redundant copies.
Data Source
AI summary
Techniques are provided by which memory pages may be migrated among PPU memories in a multi-PPU system. According to the techniques, a UVM driver determines that a particular memory page should change ownership state and/or be migrated between one PPU memory and another PPU memory. In response to this determination, the UVM driver initiates a peer transition sequence to cause the ownership state and/or location of the memory page to change. Various peer transition sequences involve modifying mappings for one or more PPU, and copying a memory page from one PPU memory to another PPU memory. Several steps in peer transition sequences may be performed in parallel for increased processing speed.