Opportunistic Memory Page Migration in Unified Virtual Memory
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Solution Overview
Problem
In multiprocessor systems, memory access operations by auxiliary processors directed to shared memory exhibit high latency, reducing the benefits of offloading tasks from the main processor, and existing solutions like copying memory pages to local memory delay the execution of auxiliary processors.
Innovation Solution
A method for opportunistic migration of memory pages between CPUs and parallel processing units (PPUs) within a unified virtual memory system, where pages accessed frequently by the PPU are migrated to PPU memory for efficient access, while CPU-shared pages remain in system memory, optimizing access performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If memory pages are copied from shared memory to local memory of auxiliary processor, then memory access latency for auxiliary processor is reduced, but execution of auxiliary processor is delayed until pages are transferred
Solution Approach 1:
The system performs preliminary actions by pre-copying memory pages to the auxiliary processor's local memory based on predicted future access patterns. The page migration device monitors access patterns and proactively transfers pages before they are actually needed, so when the auxiliary processor needs to access them, the pages are already in local memory, eliminating both latency and execution delays.
Solution Approach 2:
The system dynamically adjusts memory page placement between shared memory and local memory based on changing access patterns. The page migration device continuously monitors usage and migrates pages bidirectionally, making the memory architecture adaptive rather than static, allowing optimal performance for both CPU and auxiliary processor at different times.
2Productivity
If memory pages are migrated to local memory of auxiliary processor, then memory access efficiency is improved, but system complexity increases due to page migration management
Solution Approach 1:
The system implements self-service by enabling the auxiliary processor to autonomously manage its own memory pages. The auxiliary processor includes a page migration device that independently monitors its own access patterns and triggers page migrations without requiring complex centralized management, reducing overall system complexity while maintaining high memory access efficiency.
Solution Approach 2:
The system uses feedback mechanisms where the auxiliary processor reports access patterns to the page migration device, which then automatically adjusts page placement. This closed-loop control simplifies management by using real-time feedback from actual usage rather than requiring complex predictive algorithms or manual configuration.
3Loss of time
If frequent page migrations are performed between shared memory and local memory, then memory access performance is optimized, but system overhead increases
Solution Approach 1:
The system applies partial action by selectively migrating only the most frequently accessed memory pages to local memory, rather than migrating all pages. The page migration device identifies and migrates only the critical subset of pages that provide the greatest performance benefit, reducing migration overhead while maintaining optimized access times for hot data.
Solution Approach 2:
The system uses periodic action by implementing threshold-based migration triggers. Pages are migrated periodically when access patterns cross certain thresholds, rather than continuously. This approach optimizes performance for frequently accessed pages while avoiding the energy overhead of continuous migration monitoring and execution.
Data Source
AI summary
Techniques are disclosed for transitioning a memory page between memories in a virtual memory subsystem. A unified virtual memory (UVM) driver detects a page fault in response to a memory access request associated with a first memory page, where a local page table does not include an entry corresponding to a virtual memory address included in the memory access request. The UVM driver, in response to the page fault, executes a page fault sequence. The page fault sequence includes modifying the ownership state associated with the first memory page to be central-processing-unit-shared. The page fault sequence further includes scheduling the first memory page for migration from a system memory associated with a central processing unit (CPU) to a local memory associated with a parallel processing unit (PPU). One advantage of the disclosed approach is that the PPU accesses memory pages with greater efficiency.