Memory Page Programming with Multiple Writes Before Erase

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Solution Overview

Problem

Existing memory solutions require a memory cell to be written and erased multiple times, leading to degradation and inefficient data updates, as they do not allow for multiple writes to a page before an erase operation, resulting in unnecessary cycles and limited cell reliability.

Innovation Solution

Implementing multiple write programming for a segment of a memory device, allowing data to be updated in place within a page by writing it two or more times before an erase operation, using a write-once-memory (WOM) code to ensure increasing logic states, reducing the need for erase cycles and enabling efficient data updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a memory cell is written and erased multiple times using existing memory solutions, then data can be stored and retrieved, but the memory cell degrades and reliability decreases

Engineering Contradiction:
Improvememory cell reliabilityVSAvoidcell degradation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The memory device is divided into multiple segments (first segment and second segment), allowing data to be distributed across segments. This segmentation enables the system to perform reads from one segment while writing to another, reducing the frequency of erase operations on individual cells and thereby improving reliability by minimizing degradation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a wear-leveling mechanism that tracks the number of program and erase cycles for each memory segment. When a segment reaches its wear threshold, the system recovers by redirecting subsequent operations to a different segment, effectively discarding the worn segment from active use. This extends the overall lifespan of the memory device by evenly distributing wear across all segments.

Inventive Principle:
Principle #34Discarding and recovering

2Ease of operation

If existing memory solutions perform erase operations frequently to enable data updates, then data can be updated, but the number of erase cycles increases leading to unnecessary wear

Engineering Contradiction:
Improvedata update capabilityVSAvoiderase cycle overhead
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The system performs preliminary actions by pre-positioning data in a different segment before it is needed. When data needs to be updated, the system can write to a fresh segment while the old segment is being read, eliminating the need for immediate erase operations. This preliminary preparation of storage space allows for efficient data updates without incurring erase cycle overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent enables continuous useful action by allowing read and write operations to proceed simultaneously on different segments. While one segment is being read, another segment can be written to, maintaining continuous data availability and update capability without interruption for erase operations. This continuity eliminates idle time associated with erase cycles.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If memory devices perform traditional write and erase cycles, then data can be stored, but the total number of program and erase operations increases reducing efficiency

Engineering Contradiction:
Improvedata storage efficiencyVSAvoidprogram and erase operation overhead
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent merges write operations across multiple segments, allowing the system to accumulate write operations on one segment while simultaneously performing read operations on another. This combining of operations across segments reduces the total number of program-erase cycles needed, as data can be rewritten to a new segment without erasing the original, thereby improving productivity and reducing energy consumption.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12585583B2Multiple write programming for a segment of a memory device
Publication Date: 2026.03.24 MICRON TECHNOLOGY INC
  • US12585583B2 patent drawing
  • US12585583B2 patent drawing
  • US12585583B2 patent drawing

AI summary

A memory device can include a memory array including memory cells arranged in one or more pages. The memory array can be coupled to control logic to receive a first request to write first data to a page of the one or more pages and program the first data to the page of the one or more pages at a first time responsive to receiving the first request. The control logic is further to receive a second request to write second data to the page of the one or more pages, read the page of the one or more pages, and program the second data to the page of the one or more pages at a second time responsive to receiving the second request. The control logic can also receive an erase request to erase the one or more pages after the second time.