Memory Page Programming for Fast Power-Off Data Recovery
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Solution Overview
Problem
Existing storage devices face challenges in reducing the time required for a power off operation, particularly during sudden power loss events, which can lead to incomplete programming of memory cells and data loss.
Innovation Solution
The implementation of a memory controller that performs fine program operations on preceding pages with completed foggy operations and stores program sequence information to ensure completion of programming before power off, utilizing a foggy-fine program operation scheme.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If foggy program operations are performed on multiple pages in parallel, then programming speed is improved, but data integrity deteriorates during sudden power loss
Solution Approach 1:
The programming operation is divided into two distinct segments: foggy program operation and fine program operation. The foggy program operation programs memory cells to intermediate threshold voltage states, while the fine program operation completes the programming to final states. This segmentation allows parallel processing of foggy operations across multiple pages while ensuring data integrity by completing fine operations on at least one page before power off, even if power is suddenly lost.
Solution Approach 2:
The foggy program operation is performed as a preliminary action before the fine program operation. By completing the foggy programming on multiple pages in advance and then performing fine programming on at least one page to completion, the system ensures that even if power is suddenly lost during fine programming, the previously completed foggy programming provides a recoverable state, while the fine programming ensures at least one page has complete data integrity.
2Reliability
If fine program operations are performed on all pages before power off, then data integrity is improved, but power off time increases
Solution Approach 1:
Instead of performing fine program operations on all pages before power off, the system performs fine program operations on only at least one page to completion. This partial action approach ensures data integrity for at least one page while significantly reducing the total time required before power off, compared to completing fine programming on all pages. The foggy programming on other pages provides a recoverable intermediate state.
3Loss of time
If power off operation is performed quickly, then time loss is reduced, but programming completion deteriorates
Solution Approach 1:
The foggy program operation is performed as a preliminary action on multiple pages before the fine program operation. This allows the system to have most pages in an intermediate programmed state with reduced time investment, while still ensuring at least one page reaches complete programming status before power off. This preliminary action approach enables quick power off while maintaining programming completion integrity.
Solution Approach 2:
The fine program operation, which is time-consuming, is extracted and performed on only at least one page rather than all pages. This extraction of the critical path operation ensures that programming completion is achieved for at least one page with full data integrity, while the majority of pages can be in the faster-to-complete foggy state, thereby reducing overall power off time.
Data Source
AI summary
A storage device may include a memory device including a memory block coupled to physical word lines each including pages, and a memory controller configured to control the memory device such that, in response to a power off event occurring during a program operation on a selected page, fine program operations are performed on to-be completed pages, which precede the selected page, on which foggy program operations have been completed and on which the fine program operations have not yet been performed. The program operation may include a foggy program operation of programming memory cells included in the pages so that each memory cell has a threshold voltage corresponding to any one of intermediate states corresponding to states, and a fine program operation of programming the memory cells having the threshold voltages corresponding to the intermediate states so that each memory cell has a threshold voltage corresponding to any one state.