Nonvolatile Memory Page Program Loop Start Value Adjustment
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Solution Overview
Problem
Existing nonvolatile memory devices inefficiently perform program operations due to a constant fail bit count method, regardless of varying program conditions, which affects the classification of memory blocks as bad blocks and the correction of error bits.
Innovation Solution
A method that adjusts the start loop value for counting fail bits based on the address of a page, allowing the number of program loops to differ depending on the page address, enabling efficient error correction and reducing the time required for program operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a constant fail bit count method is used irrespective of program operation conditions, then the classification of bad blocks is simplified, but the program operation efficiency deteriorates
Solution Approach 1:
The patent applies dynamics by making the fail bit count operation dynamic rather than constant. The start loop value for fail bit counting is adjusted based on the page address (MSB or LSB), allowing the counting to begin at different points in the program loops depending on which page is being programmed. This dynamic adjustment optimizes program operation efficiency for different page types while maintaining systematic classification.
Solution Approach 2:
The patent changes the parameter of the fail bit count operation by introducing a variable start loop value that depends on the page address. Instead of using a fixed constant for all pages, the system modifies when fail bit counting begins based on whether it's an MSB or LSB page, thereby adapting the operation parameters to match different program conditions and improve overall efficiency.
2Ease of operation
If fail bit counting starts at the same point for all pages, then the operation procedure is simplified, but the program operation time increases
Solution Approach 1:
The patent applies local quality by implementing different fail bit counting strategies for different page types. Instead of applying a uniform counting approach across all pages, the system uses specific start loop values tailored to MSB pages versus LSB pages. This localized optimization reduces program operation time for each page type according to its specific characteristics.
Solution Approach 2:
The patent segments the fail bit count operation into different phases based on page address. By dividing the operation into distinct counting start points for MSB and LSB pages, the system optimizes the timing for each segment, thereby reducing overall program operation time while maintaining procedural clarity through structured segmentation.
Data Source
AI summary
A nonvolatile memory device is operated by, inter alia, performing a program operation on memory cells belonging to a page selected from among a plurality of pages, performing a verification operation on the programmed memory cells, loading a start loop value of a fail bit count set to the selected page, from among start loop values of fail bit counts set to the respective pages, and if a loop value of the program operation is greater than or equal to the start loop value, counting a number of fail bits included in data of the programmed memory cells detected in the verification operation.