Memory Page Programming Speed Classification and Evaluation Time Adjustment
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Solution Overview
Problem
Memory devices face reliability issues due to variations in program operation speeds among cells, with slow cells requiring longer programming times, leading to increased overall operation time and reduced efficiency.
Innovation Solution
A memory device and method that classify pages as fast or slow based on program operation speed, adjusting the evaluation time for verify operations accordingly, using a voltage generator and control circuit to optimize programming by performing verify operations during different evaluation times for each type of page.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a uniform program operation time is applied to all pages, then the program operation can be completed for all pages, but the overall operation time increases due to slow pages
Solution Approach 1:
The patent segments pages into fast pages and slow pages based on program operation characteristics. By dividing the page set into two categories with different evaluation times, the system can apply optimized timing strategies to each segment, thereby reducing the overall operation time while ensuring reliable programming for all pages.
Solution Approach 2:
The patent dynamically adjusts the evaluation time based on the identified page type. For slow pages, a first (longer) evaluation time is used, while for fast pages, a second (shorter) evaluation time is used. This dynamic adjustment allows the system to adapt to different page characteristics and minimize total operation time.
2Reliability
If a longer evaluation time is used for all pages, then programming reliability is improved, but the operation time for fast pages is unnecessarily extended
Solution Approach 1:
The patent applies different evaluation times to different page types based on their local characteristics. Slow pages receive a longer evaluation time to ensure reliable programming, while fast pages receive a shorter evaluation time appropriate for their speed characteristics. This localized quality approach ensures each page type receives the appropriate treatment without affecting others.
Solution Approach 2:
The patent changes the evaluation time parameter based on page classification. By identifying whether a page is fast or slow and then adjusting the evaluation time parameter accordingly, the system optimizes the balance between reliability and speed for each page type.
3Loss of time
If a shorter evaluation time is used for all pages, then operation time is reduced, but programming reliability decreases due to insufficient evaluation of slow pages
Solution Approach 1:
By segmenting pages into fast and slow categories, the patent ensures that slow pages are not subjected to insufficient evaluation time. Each segment receives an evaluation time appropriate to its characteristics, preventing reliability issues while minimizing overall operation time.
Solution Approach 2:
The patent performs preliminary classification of pages into fast and slow categories before executing the program operation. This preliminary action allows the system to prepare appropriate evaluation times for each page type, ensuring that slow pages receive sufficient evaluation time from the outset.
Data Source
AI summary
The present technology includes memory device and a method of operating the same. The memory device includes a memory block including a plurality of pages, a voltage generator configured to generate a program voltage or a verify voltage applied to a selected page among the plurality of pages, a page buffer connected to the selected page through bit lines and configured to perform a precharge operation, an evaluation operation, and a sensing operation on the bit lines during a verify operation, and a control circuit configured to store page addresses of slow pages of which a program operation speed for each is slower than an average program speed of the plurality of pages, and adjust an evaluation time of the evaluation operation according to the page addresses.


