Semiconductor Memory Page Segmentation for Faster ECC Access
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
NAND type flash memory devices face challenges with weak error correction capabilities, leading to prolonged write and read times, necessitating large numbers of write/verify operations and redundant memory arrays, which increase cost and complexity.
Innovation Solution
Implementing a semiconductor memory device with a cell array that divides page data into sectors, adds check codes, and uses a latch circuit, data input/output portions, and a control circuit to manage and correct errors, enabling efficient error correction and reducing the need for redundant memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction capability is strengthened by using conventional ECC methods, then data reliability is improved, but write time and read time are prolonged due to repeated write/verify operations
Solution Approach 1:
The patent divides page data into multiple sectors, with each sector having its own check code. This segmentation allows error correction to be performed independently on each sector rather than requiring verification of the entire page, significantly reducing the time needed for write/verify operations while maintaining strong error correction capability.
Solution Approach 2:
Check codes are added to each sector during the data input stage before writing to memory. This preliminary error correction preparation eliminates the need for repeated write/verify cycles, as the error correction capability is already built into the data structure prior to storage.
2Reliability
If conventional ECC methods are used to improve error correction, then data reliability is improved, but redundant memory arrays are required which increase device complexity and cost
Solution Approach 1:
The patent merges the error correction code storage with the main data storage by adding check codes to each sector of the page data. This integration eliminates the need for separate redundant memory arrays, reducing device complexity and cost while maintaining strong error correction capability through the sector-level check codes.
3Productivity
If page data is written all together in units of pages, then write speed is improved, but variations in memory cell write speeds cause distribution in write time across memory cells
Solution Approach 1:
By dividing page data into sectors with individual check codes, the patent enables independent error correction for each sector. This segmentation mitigates the impact of write speed variations among memory cells, as each sector can be verified and corrected independently rather than requiring uniform verification of the entire page.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution strengthens error correction capabilities, reduces write and read times, eliminates the need for redundant memory, and decreases memory size and production costs, while maintaining high-speed data transfer and access.
Implementation Method 1
data is both written and erased by an FN (Fowler Nordheim) tunnel current
Data Source
AI summary
The disclosed semiconductor memory device exhibits improved error correction capability shorter read/write times, and removes or reduces the need for redundant memory The semiconductor device has a data input portion for receiving one page of data, dividing it to a plurality of code words, generating and adding check code (parity data) for each code word, successively forming main code words, and transferring the main code words to one of a plurality of memory banks. The semiconductor device also includes a data output portion for receiving one page worth of data, including main code words transferred from the data latch circuit, correcting errors in the data when the data includes fewer than a predetermined number of errors for each main code word, adding the error information to each read code word, and outputting the result.