Memory System Pair Cell Lee Metric Code Error Correction
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Solution Overview
Problem
Variable resistance memory systems face challenges in achieving stable multi-value writing due to indefinite resistance and voltage/current conditions, leading to unreliable data storage and retrieval, particularly in phase change memories and nanotube-based cells.
Innovation Solution
The implementation of a Lee metric code (LMC) in a pair cell configuration within the memory system, which utilizes a residue field of a prime number to assign information values to resistance levels, ensuring error correction and minimizing variations in resistance values, thereby stabilizing data storage and reducing the number of cells required per information bit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-valuing a cell is used to raise storage density, then storage density is improved and cost rise is avoided, but physical quantity levels of the cell become unstable
Solution Approach 1:
The invention divides a single cell into multiple sub-cells (first sub-cell and second sub-cell) to form a pair cell. This segmentation allows independent control and measurement of each sub-cell, stabilizing the physical quantity levels while enabling multi-value storage through different resistance level combinations in the sub-cells.
2Quantity of substance
If fine pattering of cell array is used to raise storage density, then storage density is improved, but higher technologies are required and cost rises
Solution Approach 1:
The invention merges multiple binary storage units into a single multi-value cell structure (pair cell with multiple sub-cells). This combining approach achieves high storage density without requiring fine pattering, as the multi-value capability is obtained through electrical control of resistance levels rather than physical miniaturization.
3Volume of moving object
If variable resistance memory is used for mass data storage, then three-dimensional formation is enabled, but indefinite resistance and voltage/current conditions cause unreliable data storage and retrieval
Solution Approach 1:
The invention implements a measurement mechanism that reads the resistance levels of sub-cells and compares them against reference values to determine stored data values. This feedback approach compensates for indefinite resistance conditions by continuously monitoring and interpreting resistance levels, ensuring reliable data retrieval despite variable resistance characteristics.
Solution Approach 2:
The invention controls and measures multiple resistance parameters (first resistance value and second resistance value) in sub-cells, along with corresponding voltage and current parameters. By establishing specific relationships among these parameters and using reference comparisons, the system achieves reliable data storage and retrieval in three-dimensional variable resistance memory structures.
Data Source
AI summary
A memory system according to the embodiment comprises a cell array of plural cells having three or more settable physical quantity levels and operative to store a code composed of symbols expressed by elements in a finite field Zp (p is a prime), wherein a set of two cells is defined as a pair cell and a combination of physical quantity levels of the two cells contained in the pair cell is defined as a pair cell level, wherein the pair cell uses a pair cell level of plural pair cell levels, which maximizes or minimizes a physical quantity level of one cell contained in the pair cell, to assign elements in the Zp to the pair cell levels, thereby storing symbols of the code.