Memory Cell Pairing for Fast Stuck-At Fault Read Correction
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Solution Overview
Problem
Conventional error correction operations in memory devices, particularly during high-speed multiplication and accumulation operations, cause delays and reduce performance due to the use of error-correction code (ECC) algorithms.
Innovation Solution
A memory device and error correction method that utilize two memory cells to store the same write-in data, employing a page buffering circuit to read and correct read bits based on a stuck-at fault mode, generating accurate readout data without complex ECC calculations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error-correction code (ECC) algorithms are used to correct readout data from defect memory cells, then data accuracy is improved, but operation speed is reduced causing delays
Solution Approach 1:
The patent applies preliminary action by pre-distributing data across multiple memory cells and pre-arranging backup cells before errors occur. When a defect is detected during reading, the system can immediately retrieve data from backup cells without performing complex ECC calculations, thus maintaining both data accuracy and high operation speed
Solution Approach 2:
The patent extracts the error correction function from complex ECC algorithms and implements it through a simpler mechanism using dedicated backup memory cells. Instead of using sophisticated error correction codes, the system separates good cells from defect cells by pre-allocating backup cells that contain copies of important data, allowing direct retrieval when defects are detected
2Measurement precision
If complex error-correction code operations are performed, then readout data accuracy is improved, but device performance is reduced
Solution Approach 1:
The patent uses disposable backup memory cells that contain pre-copied data. Instead of investing in complex and expensive ECC运算 circuits, the system uses simple backup cells that can be quickly accessed. When a defect occurs, the system retrieves data from these pre-prepared backup cells, achieving high accuracy without the performance penalty of complex error correction operations
Data Source
AI summary
Disclosed are a memory device and an error correction method thereof. The error correction method of the memory device includes: generating a first write-in bit and a second write-in bit according to a write-in data, and writing the first write-in bit and the second write-in bit into corresponding first memory cell and second memory cell respectively; in a reading mode, providing a page buffering circuit to read a first read bit and a second read bit from the first memory cell and the second memory cell; and providing the page buffering circuit to generate a correct readout data according to a stuck-at fault mode of the memory device, the first read bit and the second read bit.