Memory Signaling with Concurrent PAM and NRZ Paths

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Solution Overview

Problem

Current memory devices face limitations in achieving high data transfer rates, reliability, and reduced power consumption due to the constraints of existing signaling techniques, particularly in volatile memory technologies like DRAM, which require frequent refreshing and have limited data retention.

Innovation Solution

Implementing a memory controller that communicates signals using multiple modulation schemes, such as a multi-symbol scheme with at least three levels and a binary-symbol scheme with two levels, over separate signal paths to enhance read and write speeds, performance, and reliability, while reducing power consumption and manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single modulation scheme is used for data transmission in memory devices, then the device complexity is reduced, but the data transfer rate and power efficiency are limited

Engineering Contradiction:
Improvedata transfer rateVSAvoidmodulation scheme complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the data transmission process by dividing data into different types (e.g., command data, data bus data, address data) and assigning different modulation schemes to different signal paths. This allows each signal path to be optimized independently for its specific data type, achieving high data transfer rates without requiring the entire system to use complex modulation schemes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic selection of modulation schemes based on the type of data being transmitted. The memory controller dynamically chooses between first and second modulation schemes for different signal paths, allowing the system to adapt its complexity to the specific transmission requirements of each data type, thereby improving overall productivity without excessive complexity.

Inventive Principle:
Principle #15Dynamics

2Productivity

If the frequency of data transfer is increased to improve data transfer rate, then productivity increases, but power consumption increases significantly

Engineering Contradiction:
Improvedata transfer rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent changes the modulation parameters (e.g., using different modulation schemes with different symbol rates and data rates) to achieve high data transfer rates without proportionally increasing the frequency of data transfer. By optimizing the modulation parameters for different data types, the system achieves high productivity while controlling power consumption.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If memory cell density is increased to improve storage capacity, then the quantity of stored data increases, but signal transmission reliability deteriorates

Engineering Contradiction:
Improvememory cell densityVSAvoidsignal transmission reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies different modulation schemes to different signal paths based on their specific requirements. By optimizing the modulation scheme for each signal path's characteristics and data type, the system maintains signal transmission reliability even as memory cell density increases and signal integrity becomes more challenging.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP3673356B1Multiple concurrent modulation schemes in a memory system
Publication Date: 2024.08.07 MICRON TECHNOLOGY INC
  • EP3673356B1 patent drawingFigure 1
  • EP3673356B1 patent drawingFigure 2
  • EP3673356B1 patent drawingFigure 3

AI summary

Methods, systems, and devices for multiple concurrent modulation schemes in a memory system are described. Techniques are provided herein to communicate data using a modulation scheme having at least three levels and using a modulation scheme having at least two levels within a common system or memory device. Such communication with multiple modulation schemes may be concurrent. The modulated data may be communicated to a memory die through distinct signal paths that may correspond to a particular modulation scheme. An example of a modulation scheme having at least three levels may be pulse amplitude modulation (PAM) and an example of a modulation scheme having at least two levels may be non-return-to-zero (NRZ).