Memory with Parallel Logical Operation Unit for Big Data Search

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Solution Overview

Problem

Current CPU-based information processing for big data searches is complex, burdensome, and inefficient, leading to high power consumption and long processing times due to the von Neumann architecture's bus bottleneck, and existing solutions like content-addressable memories are limited by large circuit size and high power consumption.

Innovation Solution

A memory with a novel information search function that incorporates a logical operation unit capable of parallel operations, allowing exact match and range searches using logical storage, product, sum, negation, and combinatorial operations, integrated into a semiconductor device with a minimal circuit configuration, enabling fast and efficient big data searches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If CPU-based sequential search is used, then information processing can be performed with simple memory structure, but information processing time becomes extremely long

Engineering Contradiction:
Improvememory structureVSAvoidinformation processing time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The memory is divided into multiple banks (first bank, second bank, etc.) that can operate independently and in parallel. Each bank can perform search operations simultaneously, thereby reducing the overall search time while maintaining relatively simple individual bank structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential single-CPU processing to parallel multi-bank processing, adding a dimensional aspect of concurrency. Multiple banks operate simultaneously on different data segments, transforming the time dimension by executing operations in parallel rather than sequentially.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If content-addressable memory (CAM) is used for fast parallel search, then information search speed is dramatically improved, but circuit size and power consumption increase significantly

Engineering Contradiction:
Improveinformation search speedVSAvoidcircuit size
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

Instead of implementing a single large CAM circuit, the patent segments the memory into multiple smaller banks that perform parallel search operations. This achieves fast search performance through parallelism while keeping each individual bank's circuit complexity manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses simple, inexpensive memory cell structures (similar to conventional RAM) rather than complex CAM cells. Multiple such simple structures work in parallel to achieve the functionality of a single complex CAM, reducing overall circuit complexity and power consumption.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Productivity

If software algorithms (hash table, index, tree structure) are used to reduce CPU load, then CPU processing burden is reduced, but pre- and post-processing complexity increases

Engineering Contradiction:
ImproveCPU processing efficiencyVSAvoidinformation processing procedure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory system performs search operations autonomously without requiring complex external software algorithms. The parallel bank structure enables the memory itself to conduct searches efficiently, eliminating the need for preprocessing steps like hashing, indexing, or tree construction that would otherwise be required.

Inventive Principle:
Principle #25Self-service

4Speed

If parallel processing by multiple CPUs is implemented, then information processing speed is improved, but peripheral circuit complexity increases excessively

Engineering Contradiction:
Improveinformation processing speedVSAvoidperipheral circuit
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple CPUs into a single memory controller that manages multiple memory banks. This consolidation achieves parallel processing speed improvements while avoiding the peripheral circuit complexity that would arise from implementing multiple independent CPU systems.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9627065B2Memory equipped with information retrieval function, method for using same, device, and information processing method
Publication Date: 2017.04.18 INOUE KATSUMI
  • US9627065B2 patent drawing
  • US9627065B2 patent drawing
  • US9627065B2 patent drawing

AI summary

CPUs are not effective for search processing for information on a memory. Content-addressable memories (CAMs) are effective for information searches, but it is difficult to build a large-capacity memory usable for big data using the CAMs. A large-capacity memory may be turned into an active memory having an information search capability comparable to that of a content-addressable memory (CAM) by incorporating an extremely small, single-bit-based parallel logical operation unit into a common memory. With this memory, a super fast in-memory database capable of fully parallel searches may be realized.