Semiconductor Memory Parameter Address Conversion Circuit

The patent introduces a converting circuit as an intermediary component between the command register and internal circuits. This converting circuit translates commands from different standards (ONFI, Toggle, etc.) into unified internal commands, and translates parameter addresses from different generations into unified internal addresses. This mediator approach maintains reliability for each generation while improving command compatibility across standards without requiring changes to the core internal circuitry.

The patent extracts the complexity of parameter management by separating it into two distinct components: a converting circuit that handles address and command translation, and the internal circuits that execute operations. By taking out the translation function into a dedicated converting circuit, the patent maintains precise parameter organization for each generation while reducing the apparent complexity in the main control path. The converting circuit acts as a buffer that absorbs the complexity of generation-specific variations.

The converting circuit is designed with universal functionality to handle multiple interface modes (ONFI, Toggle, and others) and different generations of semiconductor memory devices. A single converting circuit implementation can translate commands and addresses across all these variations, allowing the system to benefit from high-speed operations in different standards without requiring separate command sets for each mode. This multi-functional approach maintains command uniformity from the user perspective while enabling high productivity through various optimized interface modes.