Memory Partial Write Using Reset-Set Bit Operations
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Solution Overview
Problem
Existing memory systems face performance degradation due to the high number of partial write operations, which are inefficient without a data mask pin, leading to increased latency and power consumption.
Innovation Solution
A memory system and device that perform partial write operations internally through bit operations, using reset and set write commands and data, without relying on a data mask pin, by generating seed data and performing logic operations to update specific bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If partial write operations are performed using read-modify-write commands, then data can be updated in memory cells, but performance degradation occurs due to the large number of operations required
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing mask data in a mask register before the actual write operation. The mask data is prepared in advance based on the write address and chunk size, allowing the memory device to quickly identify which bits need updating without performing lengthy read-modify-write cycles during the actual write operation.
Solution Approach 2:
The patent segments the write operation into two distinct phases: a reset write command phase that generates seed data by clearing specific bits, and a set write command phase that sets the desired bits. This segmentation allows each phase to be optimized independently and reduces the total number of operations compared to traditional read-modify-write approaches.
2Device complexity
If partial write operations are performed without a data mask pin, then device complexity is reduced, but the memory controller cannot efficiently specify which data bits to update
Solution Approach 1:
The patent introduces an intermediary mask register and associated control logic within the memory device that acts as a mediator between the write command and the memory cells. This internal mask mechanism replaces the external data mask pin functionality, allowing the memory device to autonomously determine which bits to update based on the write address and pre-calculated mask data, thereby eliminating the need for a physical mask pin while preserving partial write control capability.
Solution Approach 2:
The memory device performs self-service by internally generating and applying the mask data without requiring external mask signals from the memory controller. The mask register and control logic within the memory device autonomously handle the bit selection based on the write address and chunk size, making the system self-sufficient and eliminating the need for the data mask pin.
3Productivity
If read data is transmitted from the memory device to the memory controller for modification, then data can be updated, but power consumption increases due to data transmission
Solution Approach 1:
The patent extracts the data modification function from the memory controller and relocates it to the memory device. By performing the bit clearing and setting operations internally within the memory device using the reset write and set write commands, the need to transmit read data to the memory controller for modification is eliminated, thereby reducing power consumption associated with data transmission while maintaining full data update capability.
Data Source
AI summary
A memory system includes a controller configured to transmit a reset write command and reset write data, and transmit a set write command and set write data; and at least one memory device configured to generate seed data by performing a first operation on the reset write data and read data read out from a target memory area in response to the reset write command, generate write data by performing a second operation on the seed data and the set write data in response to the set write command, and write back the write data to the target memory area.