Memory Partition Depth Configuration via Interface Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Manufacturers face challenges in selling processors with reduced memory capabilities due to manufacturing defects or operational block disabilities, as these do not appreciably affect performance but complicate memory subsystems in computing devices.
Innovation Solution
The solution involves disabling one or more memory interfaces with defects and enabling others, coupling additional memory devices to support different memory depths on partitions, using a memory map table to map physical address ranges to corresponding memory interfaces with offsets, allowing for efficient access to varying memory capacities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If one or more memory interfaces are disabled due to manufacturing defects, then fabrication yield is improved, but memory capacity is reduced
Solution Approach 1:
The memory system is divided into multiple independent partitions, each accessible through separate memory interfaces. When a defect is detected in one interface, only that specific partition becomes inaccessible while other partitions remain fully functional. This segmentation allows the system to maintain partial memory capacity rather than failing completely, thereby improving fabrication yield by enabling sale of processors with reduced but non-zero memory capacity.
Solution Approach 2:
The system dynamically changes the operational parameters by disabling specific memory interfaces based on detected defects. The memory subsystem adapts its configuration to match the actual functional capacity of the processor, allowing it to be sold as a lower-capacity version rather than discarding it entirely. This parameter change transforms a defective high-capacity processor into a functional lower-capacity processor.
2Quantity of substance
If additional memory devices are coupled to support different memory depths on partitions, then memory capacity is increased, but device complexity is increased
Solution Approach 1:
The memory system is divided into multiple independent partitions, each accessible through separate memory interfaces. When a defect is detected in one interface, only that specific partition becomes inaccessible while other partitions remain fully functional. This segmentation allows the system to maintain partial memory capacity rather than failing completely, thereby improving fabrication yield by enabling sale of processors with reduced but non-zero memory capacity.
Solution Approach 2:
The system dynamically changes the operational parameters by disabling specific memory interfaces based on detected defects. The memory subsystem adapts its configuration to match the actual functional capacity of the processor, allowing it to be sold as a lower-capacity version rather than discarding it entirely. This parameter change transforms a defective high-capacity processor into a functional lower-capacity processor.
Data Source
AI summary
Embodiments of the present technology are directed toward techniques for enabling different memory partitions to have different memory depths.


