Memory Transaction Partitioning for Predictable Shared-Memory Latency

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Solution Overview

Problem

Existing memory systems struggle to efficiently manage resource allocation among multiple software execution environments, leading to performance issues such as thrashing and unpredictable access latency, particularly in data processing apparatuses with shared memory resources.

Innovation Solution

Implementing a system that stores memory transaction parameters associated with partition identifiers, ensuring a minimum target allocation of resources for each partition, and dynamically reallocating resources based on enable settings and priority rules to maintain efficient and predictable resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory resources are shared among multiple software execution environments without partitioning, then resource utilization is improved, but performance interference and access latency become unpredictable

Engineering Contradiction:
Improveresource utilizationVSAvoidaccess latency predictability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The memory system is divided into multiple partitions, each associated with a software execution environment. Each partition has configured minimum and maximum resource allocations that are enforced by the memory controller, ensuring predictable access latency while allowing resource sharing. The partition identifier in memory transactions determines which partition's resource limits apply.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the parameters of memory resource allocation by introducing minimum and maximum target allocations as configurable parameters for each partition. These parameters are stored in configuration storage circuitry and applied by configuration application circuitry to control the amount of memory resources each partition can access, thereby balancing resource utilization with predictable performance.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If memory resources are strictly partitioned among software execution environments, then access latency predictability is improved, but resource utilization decreases due to idle resources

Engineering Contradiction:
Improveaccess latency predictabilityVSAvoidresource utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory resource allocation is made dynamic through the configuration of minimum and maximum target allocations. The memory controller dynamically adjusts resource allocation within these bounds based on actual demand, allowing resources to be shared when available and restricted when limits are reached. This dynamic control maintains predictability while improving utilization compared to static partitioning.

Inventive Principle:
Principle #15Dynamics

3Productivity

If no resource allocation limits are set for partitions, then resource availability is improved, but thrashing occurs due to excessive contention

Engineering Contradiction:
Improveresource availabilityVSAvoidthrashing
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The system introduces minimum and maximum target allocation parameters for each partition to control resource access. These parameters prevent thrashing by limiting the maximum resources any single partition can consume, while still allowing high resource availability when multiple partitions have low demand. The configuration storage and application circuitry enforce these parameters to maintain system stability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12619369B2Memory transaction parameter settings
Publication Date: 2026.05.05 ARM LTD
  • US12619369B2 patent drawing
  • US12619369B2 patent drawing
  • US12619369B2 patent drawing

AI summary

An apparatus includes processing circuitry that performs data processing in response to instructions of a software execution environment. Configuration storage circuitry stores a set of memory transaction parameters in association with a partition identifier, and configuration application circuitry applies the set of memory transaction parameters with respect to memory transactions issued by the software execution environment that identifies the partition identifier. The memory transaction parameters comprise a minimum target allocation and a maximum target allocation of a storage capacity of at least part of a memory system in handling the memory transaction that identifies the partition identifier.