Memory Device Pass Switch Leakage Current Discharge
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Solution Overview
Problem
Current memory devices face challenges in efficiently managing leakage currents and discharging potential levels during read operations, which can lead to stress on memory cells and affect overall performance.
Innovation Solution
A memory device with a pass switch circuit that includes pass transistors, which precharge or float body regions to increase leakage current, allowing for the discharge of local word line potentials to ground voltage levels when the device enters a ready state after a read operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If leakage current is increased to discharge local word line potentials, then read reclaim performance is improved, but memory cell stress increases
Solution Approach 1:
The patent applies preliminary action by precharging the body regions of pass transistors before the read operation to establish a controlled leakage current path. This precharging ensures that when the read operation completes and the memory device enters ready state, the local word lines can be discharged through the pre-established leakage current, improving read reclaim performance while controlling the discharge process to minimize stress on memory cells.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the body region potential of pass transistors during different operation phases. During read operation, the body regions are precharged to a specific potential to enable controlled leakage. After the read operation completes, the body region potential is maintained or adjusted to sustain the leakage current for discharging local word lines, thereby changing the electrical parameters to optimize both performance and stress management.
2Device complexity
If pass transistors are used to couple local and global word lines, then device complexity is reduced, but leakage current control becomes challenging
Solution Approach 1:
The patent introduces the body region of the pass transistor as an intermediary element to control leakage current. By applying a precharge potential to the body region, the patent creates a controlled intermediate state that enables the pass transistor to function as both a switch and a leakage current source. This intermediary body region potential control provides a simple yet effective mechanism to manage leakage current without adding complex control circuits.
3Speed
If body regions are precharged to increase leakage current, then local word line discharge is improved, but energy consumption increases
Solution Approach 1:
The patent applies periodic action by precharging the body regions only during specific periods - namely, in preparation for or during read operations when discharge capability is needed. The precharging is not continuous but occurs periodically when required, allowing the memory device to balance between having available discharge capability (for fast local word line discharge) and conserving energy during non-operational periods when discharge is not needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances read reclaim performance by reducing stress on memory cells and improving operational efficiency by managing leakage currents effectively.
Implementation Method 1
causing or increasing a leakage current of the pass switch circuit to discharge potential levels of the plurality of local word lines
Data Source
AI summary
The present disclosure relates to an electronic device. A memory device according to the present disclosure includes a memory block coupled to a plurality of local word lines, a peripheral circuit configured to couple the plurality of local word lines to a plurality of global word lines and configured to perform an operation on the memory block, and a control logic configured to control the peripheral circuit to cause or increase a leakage current of the pass switch circuit to discharge potential levels of the plurality of local word lines when the memory device enters a ready state after the operation.