Memory Circuit Layout Using Pass Transistor Precharge
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Solution Overview
Problem
The challenge of reducing chip size in memory circuits is hindered by transistor matching issues during miniaturization, necessitating a layout optimization rather than a reduction in transistor count, and the presence of precharge transistors complicates layout symmetry and size reduction.
Innovation Solution
The introduction of pass transistors that function as precharge transistors during idle stages, allowing nodes to maintain a precharge potential, reducing internal noise and transistors, and optimizing the layout by using pass transistors to precharge data lines, thereby eliminating the need for additional precharge transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the manufacturing process is miniaturized to reduce chip size, then the chip size is reduced, but transistor matching problems become more serious
Solution Approach 1:
The patent combines the precharge function with the pass transistor function into a single transistor component. The pass transistor serves dual purposes: transferring data during read/write operations and precharging the bit line during idle stages, thereby eliminating the need for separate precharge transistors and reducing overall transistor count while maintaining matching accuracy
Solution Approach 2:
The pass transistor is designed to perform multiple functions across different operational stages. During read/write stages, it acts as a data transfer switch; during idle stages, it automatically performs precharge functionality. This multi-functionality reduces the total number of transistors required while maintaining circuit performance
2Object-affected harmful factors
If precharge transistors are added to maintain node potential, then internal noise is reduced, but device complexity and chip size increase
Solution Approach 1:
The patent merges the precharge transistor and pass transistor into a single component. The same transistor that transfers data during active stages also performs precharge during idle stages, eliminating the need for additional precharge transistors and reducing overall device complexity
Solution Approach 2:
The pass transistor automatically performs precharge functionality during idle stages without requiring external control. By controlling the potential of the second data line, the transistor self-regulates to maintain proper node potentials and reduce internal noise without adding complexity
Data Source
AI summary
The present disclosure provides a memory circuit, which may at least include: an amplifier, the amplifier having a first node and a second node, the first node being electrically connected to a first data line, the second node being electrically connected to a first reference data line, and the amplifier being configured to amplify a voltage difference between the first data line and the first reference data line; and a first pass transistor, the first pass transistor being electrically connected to the first node and a second data line, and the first pass transistor being configured to be turned on based on a control signal in at least a part of a time period at a read/write stage, and be turned on based on the control signal in at least a part of a time period at an idle stage.