Memory Device Pass Voltage Adjustment for Read Error Reduction
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Solution Overview
Problem
Non-volatile semiconductor memory devices, such as flash memory devices, face challenges in maintaining data integrity due to the degradation of threshold voltage in memory cells, leading to increased read errors as the retention state persists, which affects the reliability of multilevel cell storage.
Innovation Solution
A memory device that includes a voltage generator, a deterioration level detection circuit, and a pass voltage changing circuit, which adjusts the pass voltage supplied to unselected word lines based on the detected deterioration level of memory cells connected to a selected word line, thereby reducing read errors by adapting to the changing threshold voltage dispersion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed pass voltage is supplied to unselected word lines, then the device operation is simple, but read errors increase as memory cells deteriorate over time
Solution Approach 1:
The patent applies dynamics by transitioning from a fixed pass voltage to a dynamically adjustable pass voltage that adapts to the deterioration level of memory cells. The voltage generator modifies the pass voltage based on detected threshold voltage shifts, allowing the system to maintain reliability while accounting for aging effects in multilevel cell memory devices.
Solution Approach 2:
The patent implements parameter changes by adjusting the pass voltage level according to the deterioration state of memory cells. The deterioration level detection circuit monitors threshold voltage changes, and the voltage generator responds by changing the pass voltage parameter to compensate for degradation, thereby maintaining read accuracy over extended retention periods.
2Reliability
If the pass voltage is increased to compensate for threshold voltage deterioration, then read errors are reduced, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by adjusting the pass voltage to the minimum necessary level required to maintain read accuracy. Rather than using a consistently high pass voltage, the system dynamically modifies the voltage parameter based on actual deterioration levels, optimizing the balance between read reliability and power consumption in multilevel cell memory devices.
Solution Approach 2:
The patent implements feedback through the deterioration level detection circuit that continuously monitors memory cell threshold voltages and provides information to the voltage generator. This feedback loop enables the system to adjust the pass voltage only when and to the extent necessary to maintain read accuracy, avoiding unnecessary power consumption associated with constantly high voltage levels.
3Adaptability or versatility
If a fixed read voltage is used, then the device operation is simple, but it cannot adapt to threshold voltage shifts caused by retention time
Solution Approach 1:
The patent applies dynamics by implementing a read voltage that transitions from fixed to adaptive based on retention state. The voltage generator modifies the read voltage level according to the deterioration level detected from threshold voltage shifts, enabling the system to maintain compatibility with existing memory interfaces while adapting to aging effects in multilevel cell memory devices.
Solution Approach 2:
The patent implements preliminary action by detecting the deterioration level and adjusting the read voltage in advance before actual read operations occur. The system proactively compensates for threshold voltage shifts that occur during retention, ensuring that when read operations are performed, the appropriate voltage levels are already in place to maintain data integrity.
Data Source
AI summary
A memory device includes a voltage generator that provides a read voltage to a selected word line and provides a pass voltage to a plurality of unselected word lines, and a deterioration level detection circuit. The selected word line and the unselected word lines are connected to a plurality of memory cells. The deterioration level detection circuit detects a deterioration level of memory cells connected to the selected word line based on data of memory cells that receive the read voltage. The memory cells connected to the selected word line and the memory cells that receive the read voltage are included in the plurality of memory cells. The voltage generator changes the pass voltage provided to the unselected word lines based on the deterioration level.