Memory Device Pass Voltage Timing for Interference Control

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Solution Overview

Problem

The existing memory devices face a challenge in managing threshold voltage distribution deterioration due to interference between adjacent memory cells, which worsens as the density of memory cells increases, leading to reduced performance and reliability.

Innovation Solution

A memory device design that includes a control logic system to apply a program voltage to a selected word line and a pass voltage to adjacent word lines, with the pass voltage increasing at multiple time points during the program operation, thereby managing the interference and maintaining optimal threshold voltage distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cell density is increased, then storage capacity is improved, but interference between adjacent memory cells worsens

Engineering Contradiction:
Improvememory cell densityVSAvoidinterference between adjacent memory cells
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies different voltage levels to different word lines during programming operations. Specifically, a first pass voltage is applied to unselected word lines and a second pass voltage is applied to selected word lines, creating local quality differences that prevent interference between adjacent cells while maintaining high density

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent dynamically adjusts voltage parameters during the programming process. The control logic modifies the voltage applied to word lines based on whether they are selected or unselected, and adjusts voltage levels across multiple pass loops to ensure proper programming without causing interference between adjacent memory cells

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If a single pass voltage is applied to all word lines, then the programming process is simplified, but threshold voltage distribution deteriorates

Engineering Contradiction:
Improveprogramming process complexityVSAvoidthreshold voltage distribution
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent segments the word lines into selected and unselected groups, and applies different voltage levels to each group. The programming process is divided into multiple pass loops where different voltage combinations are applied to different word line segments, ensuring uniform threshold voltage distribution across all memory cells

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic voltage adjustment during the programming process. The control logic adapts the voltage applied to word lines based on the programming loop number and the selection status of each word line, optimizing the threshold voltage distribution through dynamic parameter changes rather than static fixed voltages

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively improves the threshold voltage distribution and reduces interference between adjacent memory cells, enhancing the memory device's performance and reliability by concentrating the electric field on the selected word line and optimizing the programming process.

Implementation Method 1

enhancing the memory device's performance and reliability by concentrating the electric field on the selected word line

Methodology Applied
Scientific EffectElectric field concentration: Electric Field

Implementation Method 2

managing the interference and maintaining optimal threshold voltage distribution

Methodology Applied
Scientific EffectElectrical interference management: Electric Field

Data Source

PatentUS20240395340A1Memory device and method of operating the same
Publication Date: 2024.11.28 SK HYNIX INC
  • US20240395340A1 patent drawing
  • US20240395340A1 patent drawing
  • US20240395340A1 patent drawing

AI summary

According to an embodiment of the present disclosure, a memory device, a peripheral circuit configured to perform a program operation, including a plurality of program loops, and a control logic configured to, in some of the plurality of loops of the program operation, control the peripheral circuit to apply a program voltage to a selected word line, apply a first pass voltage to adjacent word lines that are adjacent to the selected word line, and then apply a second pass voltage to adjacent word lines at a predetermined time point, wherein the second pass voltage has a different magnitude compared to the first pass voltage, and in the rest of the plurality of loops of the program operation, control the peripheral circuit to apply the second pass voltage to the adjacent word lines at a time point that is different from the predetermined time point from a selected loop.