Memory Device Manufacturing Via Perpendicular SA Placement
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Solution Overview
Problem
In Dynamic Random Access Memory (DRAM) storage architecture, the dense arrangement of storage capacitors above bit lines restricts the placement of Sensing Amplifiers (SAs) and bit lines connections, limiting the connection position to endpoints, which hinders flexibility and integration density.
Innovation Solution
The method involves forming cell blocks and bit lines on opposite surfaces of a wafer, with the SA located above the bit lines in a perpendicular plane, allowing connections at midpoints rather than endpoints, enabling increased integration density and flexible connection positions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If storage capacitors are densely arranged above bit lines in the same plane, then storage density is improved, but connection flexibility between SA and bit line is worsened (limited to endpoint only)
Solution Approach 1:
The patent moves the SA from the same plane as the bit lines to a perpendicular plane above the bit lines. This dimensional transition allows the SA to connect to bit lines at multiple positions (including midpoints) without interfering with the dense storage capacitor arrangement above the bit lines in the original plane, thus resolving the contradiction between storage density and connection flexibility
2Device complexity
If SA is located in the same plane as cell blocks, then circuit integration is simplified, but area occupied by SA in cell block plane increases
Solution Approach 1:
By positioning the SA in a perpendicular plane above the bit lines rather than in the same plane as the cell blocks, the patent reduces the footprint area occupied by the SA in the cell block plane. The SA utilizes vertical space above the bit lines, effectively removing it from the horizontal plane area competition with cell blocks, thus resolving the contradiction between circuit integration and area occupation
3Ease of manufacture
If connection position is at endpoint of bit line, then manufacturing is simplified, but integration density is reduced
Solution Approach 1:
The perpendicular positioning of the SA above the bit lines enables connection at midpoints rather than only at endpoints. This spatial reconfiguration allows the bit line to be utilized more efficiently, with connections possible at multiple positions along its length, thereby increasing integration density while maintaining manufacturing feasibility through aligned connection terminals
Data Source
AI summary
Embodiments of the disclosure provide a method for manufacturing a memory device, the method includes operations. At least one cell block is formed on a wafer, each of the at least one cell block includes multiple memory cells distributed in an array, each of the multiple memory cells includes a transistor and a storage capacitor connected to a source of the transistor. Bit lines are formed on the wafer, and each of the bit lines is connected to a drain of the transistor, here each of the bit lines and the storage capacitor are located on opposite surfaces of the wafer in a thickness direction respectively. A peripheral circuit is formed above the bit lines on the wafer along a perpendicular of the wafer, here the peripheral circuit includes at least a Sensing Amplifier (SA). An electrical connection is formed between the bit line and the SA.