Removable Memory Phase Synchronization Pattern
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Solution Overview
Problem
High-frequency clock signals in removable memory devices cause significant phase shifts due to transmission delays, leading to data reception issues, especially as clock frequencies increase, and existing synchronization methods compromise data transmission efficiency.
Innovation Solution
A removable memory device that generates and transmits a phase synchronization pattern with a first level signal lasting for at least two cycles and a second level signal lasting for one cycle, allowing the host terminal to adjust its internal reception clock and ensure accurate data reception without missing portions, even at high frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high-frequency clock signals are used to increase data transmission speed, then productivity is improved, but phase shift due to transmission delay increases causing data reception errors
Solution Approach 1:
The patent applies preliminary action by transmitting a phase synchronization pattern before actual data transmission. This pattern allows the receiving end to advance its sampling timing in advance, compensating for the phase shift that will occur during data transmission. The pattern includes a first pattern signal for timing advancement and a second pattern signal for verification, ensuring the receiving end is properly synchronized before receiving high-speed data.
2Reliability
If a long synchronization pattern is transmitted to adjust phase, then reliability is improved, but data transmission efficiency decreases
Solution Approach 1:
The patent segments the synchronization pattern into two distinct parts: a first pattern signal consisting of multiple identical signals for timing advancement, and a second pattern signal for verification. This segmentation allows the receiving end to efficiently detect phase shifts using the repetitive first pattern, then verify synchronization with the second pattern, achieving reliable phase adjustment with minimal overhead compared to traditional long synchronization sequences.
Data Source
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AI summary
An object of the present invention is to provide a technique to improve the data transmission efficiency which allows correct reception of the data at the same time. A removable memory device that transmits/receives data to and from a host terminal, which includes: a clock reception section 41 of receiving transmission/reception clock, which is used for transmitting/receiving data between the host terminal and the removable memory device, from the host terminal; a phase synchronization pattern generation section 45 of generating a phase synchronization pattern, which is for adjusting a phase of internal reception clock which the host terminal incorporates for receiving data from the removable memory device, based on the transmission/reception clock; and a transmission section of transmitting the generated phase synchronization pattern to the host terminal, and in which the phase synchronization pattern includes a first level signal which lasts for at least two cycles, and a second level signal which follows the first level signal and lasts for one cycle, is provided.