Memory Pillar Dielectric Structure for Disturbance-Resistant Scaling
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Solution Overview
Problem
As semiconductor devices shrink, the reduced distance between elements leads to undesirable disturbance problems, resulting in reduced electrical performance.
Innovation Solution
A semiconductor device is designed with a substrate, a stack structure, an interconnection structure, and pillar elements that include a channel layer, a memory layer, and a dielectric layer made of different materials, along with a conductive film, to enhance electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the size of semiconductor devices is shrunk to improve density and cost efficiency, then productivity and cost per integrated circuit are improved, but the reduced distance between elements causes disturbance problems that worsen electrical performance
Solution Approach 1:
The patent applies local quality by using different dielectric materials with different breakdown voltages in different regions. Specifically, a first dielectric material with higher breakdown voltage is used in regions where higher voltage is needed (such as near control gates), while a second dielectric material is used in other regions. This localized differentiation allows the device to maintain high density with reduced element spacing while preventing disturbance problems through appropriate voltage distribution.
Solution Approach 2:
The patent employs composite materials by combining multiple dielectric materials with different electrical properties within the same memory structure. The stack structure includes alternating layers of first and second dielectric materials, creating a composite dielectric system. This composite approach enables the structure to achieve both high density (through compact stacking) and high reliability (through the complementary properties of different materials that resist disturbance effects).
Data Source
AI summary
A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a stack structure on the substrate, an interconnection structure between the substrate and the stack structure, and a pillar element penetrating the stack structure. The pillar element includes a channel layer, a memory layer surrounding the channel layer, and a dielectric layer surrounding the channel layer. The dielectric layer and the memory layer include different materials.