3D Memory Pillar Separation With Etch-Stop Contact Plug Formation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing 3D nonvolatile memory devices face challenges in improving operational reliability due to the physical scaling limits of two-dimensional memory cells, requiring innovative structures and manufacturing methods to enhance performance.
Innovation Solution
A semiconductor device design that includes a peripheral circuit structure, cell and dummy stacked bodies, pillar structures, etch stop layers, and contact plugs, with a method of manufacturing that involves forming interlayer insulating layers, etch stop layers, and simultaneously creating trenches and holes to separate pillar structures and form contact plugs, reducing processing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional manufacturing methods are used for 3D nonvolatile memory devices, then the basic device structure can be formed, but the operational reliability is insufficient due to physical scaling limits
Solution Approach 1:
The device is divided into distinct functional regions: cell region with cell stacked bodies containing pillar structures, and contact region with dummy stacked bodies containing contact plugs. The pillar structures are further segmented into first and second pillar structures separated by trenches. This segmentation allows independent optimization of each region for its specific function, improving overall reliability while managing complexity through modular design.
Solution Approach 2:
The patent transitions from two-dimensional memory cell structures to three-dimensional stacked structures with vertical channel layers penetrating through multiple interlayer insulating layers and gate electrodes. Memory cells are stacked along the vertical channel layers, utilizing the third dimension to overcome physical scaling limits and improve operational reliability without proportionally increasing planar complexity.
2Manufacturing precision
If traditional multi-step manufacturing processes are used, then each structure can be formed with adequate precision, but the number of processing steps is excessive
Solution Approach 1:
The manufacturing process merges the formation of trenches separating pillar structures and holes for contact plugs into a single simultaneous etching step. The etch stop layer is positioned to enable this simultaneous formation, allowing both features to be created in one process rather than separate steps, thereby improving productivity while maintaining precision through the etch stop layer's protective function.
Solution Approach 2:
The etch stop layer acts as an intermediary element that enables simultaneous formation of trenches and holes at different depths. It protects the peripheral circuit structure during etching while allowing selective penetration in cell and contact regions, facilitating the merged processing step without sacrificing manufacturing precision.
3Reliability
If pillar structures are not separated, then the manufacturing process is simpler, but the cell plug separation and contact plug formation reliability is reduced
Solution Approach 1:
The pillar structure is segmented into first and second pillar structures by introducing trenches between them. This segmentation improves reliability by ensuring proper separation of cell plugs and contact plugs, preventing electrical interference and ensuring distinct functional regions, while the segmented design is managed through systematic manufacturing processes.
Solution Approach 2:
The harmful electrical connection between adjacent pillar structures is extracted by removing the insulating material and forming trenches between the first and second pillar structures. This extraction of unwanted electrical pathways improves separation reliability while the remaining structured pillars maintain necessary functionality.
Data Source
AI summary
Provided herein may be a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a peripheral circuit structure formed on a substrate including a cell region and a contact region, a cell stacked body formed over the peripheral circuit structure to overlap the cell region, a dummy stacked body formed over the peripheral circuit structure to overlap the contact region, a pillar structure configured to penetrate the cell stacked body, an etch stop layer located over the peripheral circuit structure and overlapping with a bottom surface of the pillar structure, a cutting structure penetrating the pillar structure in a vertical direction and contacting the etch stop layer, and a contact plug penetrating the dummy stacked body and extending to the peripheral circuit structure.