Semiconductor Memory Pillar Insulation Filling to Suppress Oxidation

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Solution Overview

Problem

The reliability of semiconductor memory devices is compromised due to the oxidation and thinning of the semiconductor layer in memory pillars, leading to increased resistance values and potential connection failures, especially when a core insulation layer forms an air gap within the memory pillar during deposition.

Innovation Solution

The core insulation layer fills the inside of the semiconductor layer in the memory pillar without forming an air gap, suppressing oxidation and maintaining the semiconductor layer's integrity, and in the second embodiment, the semiconductor layer's thickness is managed through amorphization and specific layer structures to prevent unevenness and etching issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a core insulation layer is deposited in the memory pillar, then insulation performance is improved, but air gaps form inside the memory pillar causing semiconductor layer oxidation and thinning

Engineering Contradiction:
Improveinsulation performanceVSAvoidoxidation and thinning of semiconductor layer
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A filling layer is introduced as an intermediary between the core insulation layer and the semiconductor layer. This filling layer prevents direct contact between the core insulation layer and semiconductor layer, thereby preventing oxidation and thinning of the semiconductor layer while maintaining the insulation performance of the core insulation layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The filling layer creates an inert environment between the core insulation layer and semiconductor layer, preventing oxidative reactions. By introducing this protective intermediate layer, the semiconductor layer is shielded from harmful oxidation effects while the core insulation layer maintains its insulating function.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

2Productivity

If the semiconductor layer is made thinner to increase storage density, then memory capacity is improved, but resistance values increase and connection failures occur

Engineering Contradiction:
Improvestorage densityVSAvoidconnection reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The filling layer acts as a protective intermediary that prevents oxidation and thinning of the semiconductor layer. This allows the semiconductor layer to maintain its intended thickness and electrical properties, ensuring reliable connections while still enabling high storage density through efficient space utilization in the memory pillar.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The filling layer is deposited beforehand to prevent oxidation and thinning of the semiconductor layer. This prior protective measure ensures that the semiconductor layer maintains its structural integrity and electrical conductivity, preventing connection failures even when designed with optimized thickness for high storage density.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Manufacturing precision

If the core insulation layer deposits uniformly, then manufacturing precision is improved, but air gaps still form causing oxidation issues

Engineering Contradiction:
Improvedeposition uniformityVSAvoidoxidation due to air gaps
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The filling layer serves as a protective intermediary that is deposited between the core insulation layer and semiconductor layer. This intermediate layer prevents oxidation and thinning of the semiconductor layer caused by air gaps, while the core insulation layer can still be deposited with high uniformity and precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The filling layer is specifically deposited in the inner region of the memory pillar where air gaps and oxidation risks are most problematic. This localized protective measure addresses the specific oxidation issue without compromising the overall manufacturing precision and uniform deposition of the core insulation layer.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of semiconductor memory devices by preventing semiconductor layer breakdown and connection failures, ensuring stable operation by maintaining the semiconductor layer's functionality and reducing resistance values.

Implementation Method 1

The core insulation layer fills the inside of the semiconductor layer in the memory pillar without forming an air gap, suppressing oxidation and maintaining the semiconductor layer's integrity

Methodology Applied
Scientific EffectOxidation suppression: Oxidation

Data Source

PatentUS11282853B2Semiconductor memory device
Publication Date: 2022.03.22 KIOXIA CORP
  • US11282853B2 patent drawing
  • US11282853B2 patent drawing
  • US11282853B2 patent drawing

AI summary

According to one embodiment, a semiconductor memory device includes a base layer, conductive layers, an insulation layer, a semiconductor layer and a charge storage layer. The conductive layers are stacked above the base layer in a first direction. The insulation layer is extending in the conductive layers in the first direction. The semiconductor layer is arranged between the insulation layer and the conductive layers. The charge storage layer is arranged between the semiconductor layer and the conductive layers. The insulation layer includes a first insulation layer arranged on a side of the base layer and containing polysilazane and a second insulation layer arranged on the first insulation layer on a side opposite from the base layer.