Memory Pillar Isolation Using Slit Pillars in 3D Arrays
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Solution Overview
Problem
The formation of distinct memory pillars, slit areas, and deep contacts in 3D memory arrays is complex and inefficient, leading to reduced memory pillar density and increased die size as device scaling continues, due to the separate processing of these components and the need for larger slit and interconnect areas.
Innovation Solution
The integration of memory pillars, slit pillars, and interconnect pillars with similar structures, allowing for a unified process flow that reduces complexity and increases density, with outer isolation layers added to slit and interconnect pillars for electrical isolation and interconnection purposes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If separate processing is used for memory pillars, slit areas, and deep contacts, then each component can be formed with dedicated structures, but the device complexity and die size increase
Solution Approach 1:
The patent merges the formation processes of memory pillars, slit pillars, and interconnect pillars into a single unified process. All three pillar types are formed simultaneously through the same etching and filling operations, eliminating the need for separate processing steps. This reduces device complexity while maintaining the distinct functional structures required for each component type.
Solution Approach 2:
The patent creates a universal pillar structure that serves multiple functions. The same basic pillar geometry and material composition is used for memory pillars, slit pillars, and interconnect pillars, allowing a single process flow to create all three types. This multi-functionality approach reduces processing complexity while maintaining manufacturing precision through standardized formation steps.
2Reliability
If larger slit and interconnect areas are used for electrical isolation and interconnection, then reliability is improved, but memory pillar density decreases
Solution Approach 1:
The patent transitions from planar slit areas to vertical pillar structures for electrical isolation. Instead of expanding lateral slit dimensions, the isolation function is achieved through vertically extending pillars with isolation layers wrapped around them. This dimensional change allows sufficient electrical isolation without consuming excessive lateral space, thereby maintaining higher memory pillar density.
Solution Approach 2:
The patent uses thin isolation layers wrapped around pillar structures to achieve electrical isolation. These thin film isolation layers provide the necessary electrical barrier between adjacent memory blocks while occupying minimal space. This approach maintains reliability through effective isolation without sacrificing memory pillar density in the lateral dimensions.
3Ease of manufacture
If unified process flow is used for all pillars, then manufacturing complexity is reduced, but structural differentiation between pillar types must be maintained
Solution Approach 1:
The patent applies local quality by introducing specific features to specific pillar types after the unified formation process. Memory pillars receive charge trap structures and tunnel dielectric layers, slit pillars receive isolation layers wrapped around them, and interconnect pillars receive conductive material filling. This localized differentiation maintains structural precision while preserving the simplicity of the unified base process flow.
Data Source
AI summary
An integrated circuit memory includes a first memory block and an adjacent second memory block. The first memory block comprises a first memory pillar around which a first memory cell is formed. The second memory block comprises a second memory pillar around which a second memory cell is formed. An isolation or slit area between the first and second memory blocks electrically isolates the first and second memory blocks. In an example, the slit area comprising a slit pillar around which no memory cells are formed. The slit pillar is a dummy pillar, and insulator material electrically isolates the slit pillar from a Word Line (WL) through which it passes. The isolation layer electrically can also isolate a (WL) of the first memory block from a corresponding WL of the second memory block. In an example, the slit pillar and the memory pillars have at least in part similar structures.