Memory Pinning Engine Fragmentation Control

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Solution Overview

Problem

In multi-level system memory computing systems, the inefficiency in managing pinned memory pages leads to fragmentation issues, where available slots in the pinning region remain unused while other regions are used for pinning, reducing performance and causing imbalance in memory usage.

Innovation Solution

Implementing a pinning engine that migrates pinned memory pages from a secondary region to a dedicated pinning region when the pinning region is full, ensuring optimal usage and performance by reallocating memory slots and updating mapping tables to maintain efficient access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory pages are pinned in a secondary region when the pinning region is full, then pinning requests can be satisfied, but fragmentation occurs and the secondary region loses its caching function

Engineering Contradiction:
Improvepinning request satisfactionVSAvoidmemory access performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory space is segmented into a dedicated pinning region and a secondary region with distinct functions. The pinning region specifically handles pinned pages while the secondary region maintains caching operations, preventing functional interference and fragmentation between these two purposes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A pinning engine acts as an intermediary between memory requests and the memory regions. It manages the pinning region separately, handling pinning requests by allocating from the dedicated pinning region first, and only using the secondary region as overflow when necessary, thus protecting the secondary region's primary caching function

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If the pinning region is allocated with fixed size, then memory management is simplified, but the region may become full and unable to accommodate new pinned pages

Engineering Contradiction:
Improvememory management complexityVSAvoidpinning capacity
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The pinning region is implemented with dynamic allocation capabilities. When the pinning region becomes full, the system can dynamically expand into the secondary region or allocate additional pinning regions, allowing the pinning capacity to adapt to varying demands without requiring complete reallocation of memory management structures

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The secondary region serves multiple functions: it acts as a cache for frequently accessed data and also serves as an overflow pinning region when the dedicated pinning region is full. This multi-functionality increases adaptability without significantly increasing system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Quantity of substance

If the secondary region is used for pinning, then available pinning slots increase, but the cache performance of the secondary region deteriorates

Engineering Contradiction:
Improveavailable pinning slotsVSAvoidcache access speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

Different regions of memory are assigned different local qualities or characteristics. The pinning region is optimized for pinned page storage with appropriate access patterns, while the secondary region maintains its caching characteristics. This local differentiation ensures that each region operates at optimal performance for its intended purpose

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system maintains continuous useful action in both regions simultaneously. The pinning region continuously handles pinning operations while the secondary region continuously performs caching operations. By preventing the secondary region from being overwhelmed with pinning operations, both regions can maintain their respective useful actions without interruption or performance degradation

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentEP3353664B1Method and apparatus for pinning memory pages in a multi-level system memory
Publication Date: 2023.06.07 INTEL CORP
  • EP3353664B1 patent drawingFigure 1
  • EP3353664B1 patent drawingFigure 2a
  • EP3353664B1 patent drawingFigure 2b

AI summary

An apparatus is described. The apparatus includes a memory controller to interface with a multi-level system memory. The memory controller includes a pinning engine to pin a memory page into a first level of the system memory that is at a higher level than a second level of the system memory.