Memory Plane Pre-Charging With Charge Pump Allocation for Faster Data Output
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Solution Overview
Problem
Existing memory technologies face challenges in efficiently and power-efficiently reading and outputting data from multiple memory planes, leading to prolonged data output durations and increased power consumption.
Innovation Solution
The proposed solution involves utilizing charge pump cells to boost voltages on all word lines of memory planes, where the number of charge pump cells for the first memory plane in the data output sequence is greater than the average, and the total number of charge pump cells across all memory planes is less than the total configured, optimizing voltage boosting rates based on the data output sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If the number of charge pump cells for the first memory plane is increased to boost voltage faster, then the data output duration is reduced, but the total number of charge pump cells required increases
Solution Approach 1:
The patent applies local quality by differentiating the number of charge pump cells allocated to different memory planes based on their data output sequence. The first memory plane receives more charge pump cells (greater than average) to achieve faster voltage boosting and reduced data output duration, while subsequent memory planes receive fewer cells. This non-uniform allocation optimizes performance for the critical first output operation without unnecessarily increasing the total charge pump cell count across all planes.
2Loss of time
If the voltage boosting rate is increased for the first memory plane, then the pre-charging time is reduced, but the power consumption increases
Solution Approach 1:
The patent implements local quality in the voltage boosting process by applying a higher voltage boosting rate (greater than average) specifically to the first memory plane's word lines during pre-charging. This localized high-rate boosting reduces the pre-charging time for the first plane, which is critical for minimizing data output duration. The higher power consumption is justified as it only affects the first plane temporarily, and subsequent planes can be pre-charged at lower rates or in sequence, thereby reducing overall power consumption compared to uniformly high-rate boosting of all planes simultaneously.
3Speed
If all memory planes are pre-charged simultaneously with high voltage boosting rates, then the data output operation speed is improved, but the power consumption increases significantly
Solution Approach 1:
The patent applies segmentation by dividing the pre-charging operation into sequential phases rather than simultaneous execution. The first memory plane is pre-charged at a high voltage boosting rate to enable immediate data output, while subsequent memory planes are pre-charged at lower rates or in subsequent time slots. This temporal segmentation allows the system to achieve high data output operation speed for the critical first plane without the excessive power consumption that would result from simultaneously pre-charging all planes at high rates.
Solution Approach 2:
The patent implements preliminary action by performing pre-charging of word lines before the actual data read operation. Specifically, the first memory plane's word lines are pre-charged to pass voltage levels in advance, enabling the data output to start immediately without additional delay. This preliminary high-rate boosting of the first plane ensures the data output operation achieves maximum speed for the critical path while avoiding the need for all planes to be pre-charged simultaneously at high rates, thus reducing overall power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces data output duration and power consumption by optimizing the number of charge pump cells and boosting rates, thereby enhancing the operational performance of data output operations in memory systems.
Implementation Method 1
utilizing charge pump cells corresponding to each of the plurality of memory planes to boost voltages on all word lines corresponding to each of the plurality of memory planes to pass voltages, to complete pre-charging of the plurality of memory planes
Data Source
AI summary
The present application discloses an operation method of a memory, and a memory, a memory system, and an electronic system. The method includes: acquiring a data output command; in response to the data output command, utilizing charge pump cells to boost voltages on all word lines corresponding to each of memory planes to pass voltages, wherein the number of the charge pump cells corresponding to the memory plane of which the data output sequence is the first is greater than or equal to the average number, and the total number of the charge pump cells is less than the total number of charge pump cells that have been configured in the memory; and one of the memory planes that has been pre-charged, reading data of the one of the memory planes, and outputting the data of the one of the memory planes according to the data output sequence.