Semiconductor Memory Plate Line Voltage Supply Segmentation
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Solution Overview
Problem
Semiconductor memory devices with ferroelectric layers face challenges in achieving high-speed operation, reduced area, and low power consumption due to excessive load capacitance and high resistance in plate lines, leading to voltage undershoot or overshoot and data holding degradation, and require complex layouts that increase area and power consumption.
Innovation Solution
The semiconductor memory device incorporates plate voltage supply lines with lower resistance than the plate lines, disposed beneath a hydrogen barrier film, allowing voltage supply at multiple positions along the plate lines, stabilizing voltage and reducing area by eliminating the need for additional wiring layers and voltage generation circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If plate lines are used to drive memory cells, then memory cells can be accessed, but the load capacitance becomes excessively large and access time increases
Solution Approach 1:
The plate line voltage supply function is segmented from the plate line itself. Dedicated voltage supply lines are introduced to provide voltage to plate lines, separating the voltage supply function from the signal transmission function. This reduces the load capacitance on the plate line while maintaining access capability.
Solution Approach 2:
New voltage supply lines act as intermediaries between the voltage source and the plate lines. These intermediary lines are optimized for voltage supply with lower resistance and capacitance characteristics, reducing the direct load on plate lines and improving access speed.
2Speed
If high driving ability MOS transistor is used to drive plate line, then plate line can be driven at appropriate speed, but power consumption increases and layout area enlarges
Solution Approach 1:
The driving function is segmented from a single high-power MOS transistor to multiple lower-power transistors distributed along the voltage supply line. This allows voltage to be supplied to multiple plate lines simultaneously with reduced power consumption per transistor and reduced total layout area.
Solution Approach 2:
The voltage supply approach transitions from a single-point supply to a distributed multi-point supply along the plate line array. This dimensional change in voltage supply topology enables faster driving without requiring oversized transistors, reducing both power consumption and area.
3Speed
If plate line voltage is fixed to prevent access time increase, then access time is reduced, but ferroelectric capacitor characteristic degrades due to hydrogen exposure
Solution Approach 1:
A hydrogen barrier film is introduced as an intermediary layer between the voltage supply lines and the ferroelectric capacitors. This barrier film prevents hydrogen diffusion from the supply lines to the capacitors during manufacturing, protecting capacitor characteristics while allowing fixed voltage operation for fast access.
Solution Approach 2:
The hydrogen barrier function is extracted and implemented as a separate protective layer. This isolation removes the harmful hydrogen exposure pathway while maintaining the beneficial fixed voltage operation, resolving the contradiction between speed and reliability.
4Reliability
If hydrogen barrier film is used to prevent capacitor degradation, then capacitor characteristic is protected, but layout area increases
Solution Approach 1:
The voltage supply lines are given dual functionality: they supply voltage to plate lines and simultaneously serve as hydrogen barrier structures through the deposited film. This multi-functionality protects capacitors from hydrogen without requiring additional dedicated barrier structures, avoiding area increase.
Solution Approach 2:
The voltage supply line structure and hydrogen barrier function are merged into a single integrated structure. The barrier film is deposited over the supply lines, combining electrical function and protective function in one element, thus protecting capacitors without expanding layout area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high-speed plate line driving with stable voltage supply, reduces the memory device area, and decreases power consumption by eliminating the need for additional wiring and voltage generation circuits, thereby improving data holding and operational efficiency.
Implementation Method 1
each of the plural capacitors is covered with a hydrogen barrier film at its periphery
Data Source
AI summary
A semiconductor memory device is provided with plural memory cells, plural bit lines BL, each bit line being commonly connected to the plural memory cells that are arranged in the same row, plural word lines WL and plural plate lines CP, each word line and each plate line being commonly connected to the plural memory cells that are arranged in the same column, plural plate voltage supply lines CPS arranged in the column direction, and means for electrically connecting each of the plural plate voltage supply lines to each of the corresponding plural plate lines. The plate voltage supply lines are composed of a material having a resistance lower than that of the plate lines, each of capacitors of the plural memory cells is covered with a hydrogen barrier film HB at its periphery, the plural plate voltage supply lines are disposed beneath the hydrogen barrier film HB, and the plural plate voltage supply lines CPS are, when viewed in a plane, electrically connected to the same plate line at plural positions of the same plate line, within a region where the hydrogen barrier film is disposed.