3D Memory Plug Region Layout for Insulating Film Space
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Solution Overview
Problem
In three-dimensional semiconductor memory devices, the space for disposing an insulating film between electrode layers is often insufficient due to the formation of slits and insulating films, which can hinder the effective division and connection of electrode layers.
Innovation Solution
The semiconductor device design includes a plug region with a specific structure that allows for the suitable disposition of insulating films, where the insulating films are formed in a way that they do not only fill the slits but also provide adequate space for contact plugs to connect multiple electrode layers, eliminating the need for a staircase structure and ensuring sufficient space for insulating film placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If slits are formed in the stacked film and insulating film is formed between the slits, then the electrode layers are divided, but the space for disposing the insulating film becomes insufficient
Solution Approach 1:
The patent transitions from a two-dimensional planar layout to a three-dimensional stacked structure. Multiple electrode layers are arranged vertically in the stacking direction, allowing insulating films to be disposed between layers in the vertical dimension rather than competing for horizontal space. This dimensional change resolves the space insufficiency problem while maintaining electrode layer division.
Solution Approach 2:
The stacked film is segmented into multiple discrete electrode layers separated by insulating films. Each electrode layer can be independently formed and positioned, allowing precise control over the spacing and arrangement of insulating films. This segmentation enables adequate space allocation for insulating films between each electrode layer pair.
2Reliability
If insulating films are formed to fill slits, then electrode layers are separated, but adequate space for contact plugs to connect multiple electrode layers is not provided
Solution Approach 1:
Contact plugs are arranged vertically in the stacking direction to connect corresponding electrode layers across multiple stacked films. This vertical arrangement in the third dimension simplifies the connection structure compared to complex lateral routing, reducing device complexity while ensuring reliable electrode layer separation through insulating films.
Solution Approach 2:
Contact plugs are positioned to pass through multiple stacked films and electrode layers in a nested configuration. Each contact plug connects corresponding electrodes across layers, creating a hierarchical connection structure that simplifies the overall device complexity while maintaining proper electrode separation.
3Area of stationary object
If a staircase structure is used to provide space, then insulating films can be disposed, but the structure becomes more complex
Solution Approach 1:
Instead of using a complex staircase structure in the horizontal plane, the patent utilizes the vertical stacking direction to provide adequate space for insulating films. Multiple electrode layers are arranged in the stacking direction with insulating films disposed between them, eliminating the need for staircase configurations and reducing device complexity.
Solution Approach 2:
The conventional approach of expanding horizontally with staircase structures is inverted by utilizing vertical stacking. The space for insulating films is provided in the stacking direction rather than through lateral expansion, fundamentally reversing the spatial arrangement strategy and simplifying the overall device structure.
Data Source
AI summary
A semiconductor device includes a substrate, and a stacked film provided above the substrate and including a plurality of electrode layers separated from each other in a first direction. The device further includes an array region provided on the substrate and including a memory cell array having a plurality of word lines and a plurality of select lines that constitute the plurality of electrode layers. The device further includes a first plug region provided on the substrate, located in a second direction of the array region, and including a first contact plug electrically connected to a first select line of the plurality of select lines. The device further includes a second plug region provided on the substrate, located in the second direction of the first plug region, and including a second contact plug electrically connected to a first word line of the plurality of word lines.