3D Semiconductor Memory Stack for Concurrent Plug and Support Formation
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Solution Overview
Problem
The manufacturing process of three-dimensional semiconductor memory devices is complex and requires separate processes for forming cell plugs and supports, which complicates the overall production.
Innovation Solution
A semiconductor memory device design that includes a semiconductor substrate with a memory cell region and contact regions, featuring a first and second stacked structure with alternating interlayer insulating and conductive layers, where cell plugs and supports are formed simultaneously within these structures, simplifying the manufacturing process by eliminating the need for separate support formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate processes are used for forming cell plugs and supports, then the structural integrity and functionality are ensured, but the manufacturing process complexity increases
Solution Approach 1:
The patent combines the formation of cell plugs and supports into a single integrated process. The cell plugs and supports are formed simultaneously using the same etching and filling operations, eliminating the need for separate processing steps. This merging of operations reduces manufacturing complexity while maintaining the structural integrity of both components through unified process control and consistent material deposition.
2Ease of manufacture
If cell plugs and supports are formed simultaneously, then the manufacturing process is simplified, but the precision of individual component formation may be compromised
Solution Approach 1:
The patent applies local quality by using selective masking patterns that define different regions for cell plugs and supports. The masking layers are patterned with specific geometries that guide the etching process to form cell plugs in memory cell regions and supports in contact regions. This localized control through spatially varying mask patterns ensures high precision for both component types despite their simultaneous formation, as each region receives tailored processing conditions through the mask design.
3Manufacturing precision
If multiple separate processes are used for forming different components, then the manufacturing precision is maintained, but the production time increases
Solution Approach 1:
The patent implements continuous useful action by performing multiple formation operations in an uninterrupted sequence. The etching process continuously removes material to define cell plug and support regions, followed by continuous filling operations that deposit materials into all openings simultaneously. This continuous process flow eliminates idle time between separate formation steps while maintaining precision through controlled process parameters and sequential operation stages.
Data Source
AI summary
The present disclosure relates to a semiconductor memory device including a semiconductor substrate including a memory cell region and contact regions, a first stacked structure on the semiconductor substrate, a second stacked structure disposed between the semiconductor substrate and the first stacked structure, a plurality of cell plugs extending in a vertical direction crossing a top surface of the semiconductor substrate and arranged between the first stacked structure and the second stacked structure in the memory cell region, and a plurality of supports extending in the vertical direction and arranged on the first stacked structure in the contact region, wherein the second stacked structure is arranged in a different level from the plurality of supports.